MT28F004B5-1 Micron, MT28F004B5-1 Datasheet
MT28F004B5-1
Related parts for MT28F004B5-1
MT28F004B5-1 Summary of contents
Page 1
... MT28F004B5 MT28F400B5 5V Only, Dual Supply (Smart 5) 0.18µm Process Technology 40-Pin TSOP Type I GENERAL DESCRIPTION The MT28F004B5 (x8) and MT28F400B5 (x16, x8) are nonvolatile, electrically block-erasable (Flash), programmable, 4,194,304 bits organized as 262,144 words (16 bits) or MARKING 524,288 bytes (8 bits). Writing or erasing the device is done with ...
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... Order Number and Part Marking MT28F400B5WG-8 B MT28F400B5WG-8 T MT28F400B5WG-8 BET MT28F400B5WG-8 TET Notes: 1. Contact factory for availability. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY Pin Assignment (Top View) 48 A16 47 BYTE ...
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... Command OE# Execution WE# Logic RP Notes: 1. Does not apply to MT28F004B5. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY Functional Block Diagram 16KB Boot Block 8KB Parameter Block 18 (19) 9 8KB Parameter Block 96KB Main Block ...
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... Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY SYMBOL TYPE WE# Input Write Enable: Determines if a given cycle is a WRITE cycle. If WE# is LOW, the cycle is either a WRITE to the command execution logic (CEL the memory array ...
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... The READ ARRAY command must be issued before reading the array after writing or erasing. 6. When WP RP# may A1–A8, A10–A17 = Value reflects DQ8–DQ15. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY 1 CE# OE# WE# WP# BYTE ...
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... The READ ARRAY command must be issued before reading the array after writing or erasing. 6. When WP RP# may A1–A8, A10–A18 = 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY 1 RP# CE# OE# WE ...
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... WP# pin is brought HIGH. This provides additional security for the core firmware during in-system firm- ware updates should an unintentional power fluctua- tion or system reset occur. The MT28F004B5 and MT28F400B5 are available with the boot block starting at the bottom of the address space (“B” suffix) or the top of the address space (“ ...
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... See the Command Execution section for more detail. Deep Power-down Mode To allow for maximum power conservation, the MT28F004B5 and MT28F400B5 feature a very low cur- rent, deep power-down mode. To enter this mode, the RP# pin is taken to V ±0.2V. In this mode, the current SS draw is a maximum of 20µ ...
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... Parameter Block 02000h 04000h 01FFFh 03FFFh 16KB Boot Block 00000h 00000h 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY Figure 1 Memory Address Maps MT28F004B5/400B5xx-xxT WORD ADDRESS 3FFFFh 3E000h 3DFFFh 3D000h 3CFFFh ...
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... READ STATUS 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY REGISTER may be given to return to the status register read mode. All commands and their operations are described in the Command Set and Command Execu- tion sections ...
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... COMMAND SET or WP# be HIGH simplify writing of the memory blocks, the MT28F004B5 and MT28F400B5 incorporate an ISM that controls all internal algorithms for the WRITE and ERASE cycles. An 8-bit command set is used to control the device. Details on how to sequence commands are provided in the Command Execution section. Table 1 lists the valid commands ...
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... PP SR0-2 RESERVED 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY ISM. The erase, write and V cleared using CLEAR STATUS REGISTER. If the Vpp status bit (SR3) is set, the CEL does not allow further WRITE or ERASE operations until the status register is cleared ...
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... Addresses are “Don’t Care” in first cycle but must be held stable Address to be written Data to be written to WA. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY first cycle. The next cycle is the WRITE, during which ...
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... Notes: 1. SR3–SR5 must be cleared using CLEAR STATUS REGISTER. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY ERASE Suspension The only command that may be issued while an ERASE is in progress is ERASE SUSPEND. This com- mand enables other commands to be executed while pausing the ERASE in progress ...
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... WRITE or ERASE is completed. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY POWER-UP The likelihood of unwanted WRITE or ERASE opera- tions is minimized because two consecutive cycles are required to execute either operation ...
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... If SR3 is set during a WRITE or BLOCK ERASE attempt, CLEAR STATUS REGISTER must be issued before further WRITE or ERASE operations are allowed by the CEL. 5. Status register bits 3-5 must be cleared using CLEAR STATUS REGISTER. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY Start (WRITE completed) NO ...
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... If SR3 is set during a WRITE or BLOCK ERASE attempt, CLEAR STATUS REGISTER must be issued before further WRITE or ERASE operations are allowed by the CEL. 6. Status register bits 3-5 must be cleared using CLEAR STATUS REGISTER. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY 1 Start (ERASE completed) ...
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... Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY ERASE SUSPEND/RESUME Sequence Start (ERASE in progress) WRITE B0h (ERASE SUSPEND STATUS REGISTER READ NO SR7 = 1? YES NO SR6 = 1? YES WRITE FFh (READ ARRAY) Done NO Reading? YES WRITE D0h ...
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... OUT OUT CC Notes: 1. All voltages referenced to V 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to ....-0.5V to +6V** SS the device. This is a stress rating only, and functional † ...
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... Notes: 1. Vcc = MAX during Icc tests. 2. Icc is dependent on cycle rates. 3. Icc is dependent on output loading. Specified values are obtained with the outputs open. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY £ +70ºC) and Extended Temperature (-40ºC £ ...
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... OE# or CE# HIGH to output in High-Z Output hold time from OE#, CE# or address change RP# LOW pulse width Notes: 1. OE# may be delayed by 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY £ +70ºC) and Extended Temperature (-40ºC £ SYMBOL ...
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... ET SYMBOL MIN ACE t AOE t AA Notes: 1. BYTE# = HIGH (MT28F400B5 only). 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY = 100pF L WORD-WIDE READ CYCLE VALID ADDRESS ACE t AOE MAX UNITS SYMBOL t ns ...
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... MIN ACE t AOE t AA Notes: 1. BYTE# = LOW (MT28F400B5 only). 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY BYTE-WIDE READ CYCLE VALID ADDRESS ACE t AOE HIGH-Z t RWH £ +70ºC) A £ +85ºC) ...
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... CC PP operations. 4. Applies to MT28F400B5 only. 5. Applies to MT28F004B5 and MT28F400B5 with BYTE = LOW. 6. Parameter is specified when device is not accessed. Actual current draw will READ is executed while the device is in erase suspend mode. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 ...
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... REL is required to relock boot block after WRITE or ERASE to boot block. 6. Typical values measured Assumes no system overhead. 8. Typical WRITE times use checkerboard data pattern. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY £ +70ºC) and Extended Temperature (-40ºC £ SYMBOL ...
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... Notes: 1. Address inputs are “Don’t Care” but must be held stable BYTE# is LOW, data and command are 8-bit. If BYTE# is HIGH, data is 16-bit and command is 8-bit (MT28F400B5 only). 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY WRITE/ERASE CYCLE WE#-CONTROLLED WRITE/ERASE ...
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... Either RP WP# HIGH unlocks the boot block Measurements tested under AC Test Condition 1, V 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY = 5V ±10 4Mb ©2002, Micron Technology Inc. ...
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... If BYTE# is LOW, data and command are 8-bit. If BYTE# is HIGH, data is 16-bit and command is 8-bit (MT28F400B5 only). 3. Either RP WP# HIGH unlocks the boot block. HH 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY WRITE/ERASE CYCLE CE#-CONTROLLED WRITE/ERASE A IN ...
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... Notes: 1. Contact factory for availability 2. All dimensions in millimeters MAX/MIN or typical where noted. 3. Package width and length do not include mold protrusion; allowable mold protrusion is 0.1" per side. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY = 5V ±10%. CC ...
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... Notes: 1. All dimensions in millimeters MAX/MIN or typical where noted. 2. Package width and length do not include mold protrusion; allowable mold protrusion is 0.1" per side. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY 40-PIN PLASTIC TSOP I (10mm x 20mm) ...
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... Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY 48-PIN PLASTIC TSOP I (12mm x 20mm) ...
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... S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, Internet: http://www.micron.com, Customer Comment Line: 800-932-4992 Micron and the Micron and M logos are trademarks and/or service marks of Micron Technology, Inc. 4Mb Smart 5 Boot Block Flash Memory MT28F004B5_3.fm - Rev. 3, Pub. 8/2002 SMART 5 BOOT BLOCK FLASH MEMORY 32 4Mb ...