NE5537 Philipss, NE5537 Datasheet
NE5537
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NE5537 Summary of contents
Page 1
... JFET input transistors to achieve low leakage current from the hold capacitor. A unique circuit design for leakage current cancellation using current mirrors gives the NE5537 a low droop rate at higher temperature. The output stage has the capability to drive a 2k load. The logic input is compatible with TTL, PMOS or CMOS logic ...
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... =25 C (still-air package D package FE package T Operating ambient temperature range A SE5537 NE5537 T Storage temperature range STG V Input voltage IN Logic to logic reference differential voltage Output short circuit duration Hold capacitor short circuit duration T Lead soldering temperature (10sec max) SOLD NOTES: 1 ...
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... C “hold” mode J V =10V, OUT C =1000pF H C =0. =2V IN OUT V =0V 80 OUT T = 15V 886 Product specification NE/SE5537 NE5537 UNIT UNIT Max Min Typ Max 100 0.004 0.01 % ...
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Philips Semiconductors Linear Products Sample-and-hold amplifier TYPICAL PERFORMANCE CHARACTERISTICS Input Bias Current –5 –10 –15 –50 – 100 125 150 JUNCTION TEMPERATURE ( C) Hold Step 100 V+ = V– ...
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Philips Semiconductors Linear Products Sample-and-hold amplifier TYPICAL PERFORMANCE CHARACTERISTICS Dynamic Sampling Error 100 330pF 0. 0.033 F 0 3300pF 1000pF –10 –100 0 100 1000 INPUT SLEW RATE (V/ms) Phase and Gain ...
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... The block diagram of the NE5537 is a closed loop, non-inverting unity gain sample-and-hold system. The input buffer amplifier supplies the current necessary to charge the hold capacitor, while ...
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... FET amplifiers double in required bias current for every 10 degree increase in junction temperature.) Sampling time for the NE5537 is less than 10 s (measured to 0.1% of input signal). Leakage current is 6pA at a rate output load BASIC APPLICATIONS ...
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... SUBSTRATE Figure 3. Analog Data Multiplexing SPECIAL NOTES 1. Not all definitions herein defined are measured parametrically for the NE5537, but are legitimate terms used in sample-and-hold systems. 2. Reference should be made to Design Engineering, Volumes 23 (Nov. 8, 1978), 25 (Dec. 6, 1978) and 26 (Dec. 20, 1978) for articles written by Eugene Zuch of Datel Systems, Inc., for a further discussion of sample-and-hold circuits. 3. Reference also made to National Semiconductor Corporation’ ...