SPFD54124B Drise, SPFD54124B Datasheet - Page 143

• Manufacturer Part Number: SPFD54124B
• Description: 396-Channel 6-Bit Source Driver
• Manufacturer: Drise

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7.4.2.
The image information must be correct on the display, when the timings are in range on the interface.
However, the image information can be incorrect on the display, when timings are not out of range on the interface (Out of the range timings
cannot on the host side). The correct image information must be displayed automatically (by the display module) on the next frame (vertical
sync.) when there is returned from out of the range to in range interface timing.
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Proprietary & Confidential
General Timing Diagram
VP
Horizontal Sync.
Vertical Sync.
VS
VBP
HDISP
VFP
0
1
1
0
HPW
Invisible Image
= Timing information what is not possible to see on the display
= Blanking Time
DE = ‘0’ (Low)
Fig. 7.4.2 RGB General Timing diagram
HBP
Visible Image
= Image which can see on the display
= Active
DE = ‘1’ (high)
143
HP
HDISP
SPFD54124B
Preliminary
HFP
Preliminary Version: 0.6
APR. 26, 2007