MT8962AS1 Zarlink Semiconductor, Inc., MT8962AS1 Datasheet - Page 20

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MT8962AS1

Manufacturer Part Number
MT8962AS1
Description
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
* Typical figures are at 25
Note 7: 0dBm0=1.185 V
AC Electrical Characteristics - Receive (D/A) Path
T
Filter Gain Setting = 0dB. Outputs unloaded unless otherwise specified.
A
11
12
13
14
15
16
=0 to 70
N
O
G
A
A
L
°
C, V
Envelope Delay
Envelope Delay 1000-2600 Hz
Variation with
Frequency
Gain Relative to
Gain @ 1004 Hz
(See Figure 11)
Crosstalk A/D to D/A
Power Supply
Rejection
Overload Distortion
(See Fig. 15)
DD
=5V
±
5%, V
°
RMS
C with nominal
EE
for
=-5V
600-3000 Hz
400-3200 Hz
µ
<200 Hz
200 Hz
300-3000 Hz
3300 Hz
3400 Hz
4000 Hz
≥4600 Hz
-Law codec and 0dBm0=1.231 V
±
5%, V
V
V
±
DD
EE
5V supplies. For design aid only: not guaranteed and not subject to production testing.
MT8960/61/62/63/64/65/66/67
Ref
=2.5V
±
PSRR
PSRR
0.5%, GNDA=GNDD=0V, Clock Frequency = 2.048MHz,
CT
G
D
D
Zarlink Semiconductor Inc.
AR
DR
RR
TR
3
4
-0.125
-0.350
- Voltages are with respect to GNDD unless otherwise stated.
-0.80
-0.5
20
33
35
RMS
for A-Law codec.
170
265
90
-0.100
0.125
0.125
0.125
0.030
-14.0
-28.0
210
-70
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
µs
µs
µs
µs
@ 1004 Hz
Input Signal:
400 - 3200 Hz digital
sinewave at 0 dBm0
0 dBm0 Input Signal
Receive
Filter
Response
0 dBm0 @ 1.02 kHz
in A/D
Input 50 mV
1.02 kHz
Input frequency=1.02
kHz
Data Sheet
RMS
at

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