MD4811-d512-MECH-P M-Systems, MD4811-d512-MECH-P Datasheet - Page 106

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MD4811-d512-MECH-P

Manufacturer Part Number
MD4811-d512-MECH-P
Description
DiskOnChip-Based MCP Including Mobile DiskOnChip G3 and Mobile RAM
Manufacturer
M-Systems
Datasheet
10.3.8 Interrupt Timing
10.3.9 DMA Request Timing
89
Tho(DMARQ-OE)
t
P
Tw(DMARQ#)
(OE-DMARQ)
Note: Polarity of DMARQ# may be inverted based on the NORMAL bit of DMA Control Register[0].
Tw(IRQ#)
DMARQ#
OE#/CE#
Symbol
Symbol
IRQ#
IRQ# asserted pulse width (Edge mode)
DMARQ# asserted pulse width
DMARQ# asserted to start of cycle
Start of cycle to DMARQ# negated
Figure 34: IRQ# Pulse Width in Edge Mode
Figure 35: DMARQ# Pulse Width
Table 22: DMA Request Timing
T
HO
Table 21: Interrupt Timing
MARQ-OE)
Description
Data Sheet, Rev. 1.1
T
W
Description
(DMARQ)
Tw(IRQ#)
T
P
(OE-DMARQ)
Min
250
0
Min
250
TBD
Max
500
Mobile DiskOnChip G3
Max
500
nSec
nSec
nSec
91-SR-011-05-8L
Unit
nsec
Unit

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