CS4811 Cirrus Logic, CS4811 Datasheet
CS4811
Related parts for CS4811
CS4811 Summary of contents
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... SPI or I features such as single +5 V operation simplify system design. Firmware for the CS4811 is provided by Cirrus Logic. There are two different firmware codes available; one for guitar effects and one for audio mixers. The guitar effects firmware provides a host of electric guitar effects includ- ing spring reverb, delay, chorus, flange and tremolo ...
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... Cirrus Logic, Inc. The names of products of Cirrus Logic, Inc. or other vendors and suppliers appearing in this document may be trademarks or service marks of their respective owners which may be registered in some jurisdictions. A list of Cirrus Logic, Inc. trade- marks and service marks can be found at http://www.cirrus.com Mode ................................................................................................ 14 CS4811 2 C MASTER .................................. 8 DS486PP2 ...
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... Figure 5. Typical Connection Diagram, SPI Mode .................................................. 11 Figure 6. Optional Line Input Buffer ........................................................................ 12 Figure 7. Butterworth Output Filters ........................................................................ 13 Figure 8. Output Mute Circuit .................................................................................. 13 Figure 9. Control Port Timing, SPI Master Mode Self-Boot ..................................... 14 Figure 10.Control Port Timing, I2C Master Mode Self-Boot ..................................... 15 Figure 11.CS4811 Suggested Layout ...................................................................... 16 Figure 12.Pin Assignments ...................................................................................... 17 DS486PP2 2 C Mode .................................................. 11 CS4811 ...
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... C; VA Full Scale Input Sine wave, 997 Hz Symbol Stereo Audio channels (A weighted, Note 4) (unweighted, Note 4) (Note 1,4) THD+N (Note 5) (Note 2) (Note 2) CMRR -3dB (Note 3) -0.14dB (Note (Note 3) rms CS4811 Min Typ Max Units Bits 93 100 - ...
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... C; VA Full Scale Output Sine wave, 997 Hz Symbol (DAC not muted, A weighted) THD+N (Note 6) (Note 6) (Differential) (Note 2) (Fs/2 to 2Fs, Note 2) CCIR-2K (Note 7) (1 kHz Note 2) rms, Specifications are subject to change without notice. CS4811 Min Typ Max Units Bits 95 100 - dB - -90 -85 ...
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... XTI Duty Cycle XTI =256Fs XTI Jitter Tolerance RST Low Time Notes: 8. Guaranteed by characterization but not tested power-up, the CS4811 RST pin should be asserted until the power supplies have reached steady state 25° outputs loaded with 30 pF) ...
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... Figure 1. SPI Control Port Timing CS4811 (TA = 25° C, Typ Max Units Fs - kHz 1/(2*Fs 1/(2*Fs 100 ...
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... Repeated t cldv t high t hdst sud t sust low hdd 2 Figure Control Port Timing CS4811 2 C MASTER (T A Min Typ Max - 1/(2*Fs 1/(2*Fs 250 - - 1 300 4 ...
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... 25° Symbol (except XTI) V (except XTI -2.0 mA (except XTO 2.0 mA (except XTO (XTI) V (XTI) V (Digital Inputs) (High-Z Digital Outputs pF) L Symbol CS4811 Min Typ Max -0.3 - 6.0 -0 ±10.0 -0.7 - (VA)+0.7 -0.7 - (VD)+0.7 -55 - +125 -65 - +150 (All voltages with respect to AGND = DGND = Min ...
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... PIO1 37 PIO2 35 PIO3 AGND1..4 DGND1..4 XTO XTI CS4811 +5 V Supply + 1..2 7 AOUT + ANALOG 8 FILTER AOUT - VD 70, 73 RES-VD 9, 10, 14, 15, 16, 17, 20 RES-NC 21, 22, 23, 47, 57, 58, 59 RES-NC 60, 61, 71, 95, 97, 90, 91 RES-NC 32, 36, 38, 48, 96, 82, 83 ...
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... AD0/ AD1/CDIN SPI/I2C 72 Reset RST Circuit RESET Figure 4. Typical Connection Diagram 2 SCL/CCLK 62 SDA/CDOUT SPI 68 AD0/CS EEPROM 67 AD1/CDIN 69 SPI/I2C D 72 Reset RST Circuit RESET Figure 5. Typical Connection Diagram, SPI Mode CS4811 CS4811 2 C Mode CS4811 11 ...
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... FUNCTIONAL DESCRIPTION 3.1 Overview The CS4811 is a complete audio subsystem on a chip, integrating a proprietary 24-bit audio process- ing engine with large on chip RAM memories and a single channel 24-bit audio codec. The delta-sigma ADC includes linear phase digital anti-aliasing filters and only requires a single-pole external passive filter ...
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... Activating the mute circuit is recommended on power-up and power-down to avoid the output of undesirable audio signals. 3.4 Clock Generation The master clock to operate the CS4811 may be gen- erated by using the on-chip oscillator with an exter- nal crystal or may be input from an external clock source. 3.4.1 Clock Source The CS4811 requires a 256 Fs master clock to run the internal logic ...
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... CDIN, the control data input, is the serial data input line to the CS4811. CDOUT, the control data output, is the output data line from the CS4811. CS, the chip select signal, is asserted to enable an external SPI port. Data is clocked in on the rising edge of CCLK and clocked out on the falling edge ...
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... PROM until the last byte has been received. These bytes include initialization and configuration data for the device along with the application firmware code. After the last byte, the CS4811 initiates a stop condition and begins program execution. At this point, the serial control port becomes inactive and cannot be accessed ...
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... When using separate supplies, the analog and digi- tal power should be connected via a ferrite bead, positioned closer than 1" to the device (see Figure 11). The CS4811 VA pin should be derived from the quietest power source available. If only one supply is available, use the suggested arrange- ment in Figure 3 ...
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... Figure 12. Pin Assignments CS4811 VD VD DGND DGND SCL/CCLK SCL/CCLK ...
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... V. The + and - output signals are 180° out of phase resulting in a nominal differential output voltage of twice the output pin voltage. For best performance, an anti-imaging filter is required. Figure 7 shows the recommended second and third order Butterworth differential-to-single- ended output buffer circuits. 18 CS4811 DS486PP2 ...
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... Alternately, an external clock source may be applied to XTI. The clock frequency must be 256xFs. DS486PP2 2 C format if tied SPI format if tied to DGND. mode, AD0 is an input and must be tied to ground. In SPI mode output 2 ® C mode, SDA is the bidirectional data I/O line. In SPI mode, CDOUT is the CS4811 2 C mode. In SPI mode, it clocks 19 ...
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... These pins are reserved and must be tied to VD for normal operation. RES-DGND - Reserved, Connect to DGND These pins are reserved and must be tied to digital ground for normal operation. RES-AGND - Reserved, Connect to AGND These pins are reserved and must be tied to analog ground for normal operation. 20 CS4811 The DS486PP2 ...
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... The change in gain value with temperature. Units in ppm/°C. Offset Error For the ADCs, the deviation in LSB's of the output from mid-scale with the selected input grounded. For the DAC's, the deviation of the output from zero (relative to CMOUT) with mid-scale input code. Units are in volts. DS486PP2 CS4811 21 ...
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... B L INCHES NOM MAX -- 0.134 0.012 0.014 0.012 0.015 0.677 0.687 0.551 0.555 0.91 0.923 0.79 0.791 0.026 0.030 4.00° 7.000° 0.035 0.041 CS4811 A A1 MILLIMETERS MIN NOM MAX -- -- 3.400 0.250 0.30 0.350 0.220 0.30 0.380 16.950 17.20 17.450 13.900 14.00 14.100 22.950 23.20 23.450 19.900 20.0 20 ...
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Notes • ...
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