CS8126 Cherry Semiconductor Corporation, CS8126 Datasheet - Page 5

• Manufacturer Part Number: CS8126
• Description: 5V/ 750mA Low Dropout Linear Regulator with Delayed RESET
• Manufacturer: Cherry Semiconductor Corporation

The CS8126
Reset and Delay comparators, a latching Delay capacitor
discharge circuit, and operates down to 1V.
The
ON and OFF parameters as specified. The
NPN transistor is controlled by the two circuits described
(see Block Diagram).
This circuit monitors output voltage, and when the output
voltage falls below V
sistor to be in the ON (saturation) state. When the output
voltage rises above V
output transistor to go into the OFF state if allowed by
the
This circuit provides a programmable (by external capaci-
tor) delay on the
vides source current to the external delay capacitor only
when the "Low Voltage Inhibit" circuit indicates that out-
put voltage is above V
sinks current to ground (used to discharge the delay
capacitor). The discharge current is latched ON when the
RESET
RESET
(3)
Delay circuit.
circuit output is an open collector type with
RESET
RESET
Delay
Low Voltage Inhibit Circuit
V
V
V
V
RESET
OUT
RT(OFF)
V
RT(ON)
DC(LO)
RESET Delay Circuit
DC(HI)
function, has hysteresis on both the
RT(OFF)
RT(ON)
RT(ON)
output lead. The Delay lead pro-
, this circuit permits the
, causes the
. Otherwise, the Delay lead
V
V
RL
V
RH
DH
RESET
RESET
output tran-
RESET Circuit Waveform
(1)
t
output
Delay
RESET
Circuit Description
(2)
5
(2)
output voltage falls below V
fully discharged anytime the output voltage falls out of
regulation, even for a short period of time. This feature
ensures a controlled
detection of an error condition. The circuit allows
the
only when the voltage on the Delay lead is higher than
V
The Delay time for the
the formula:
If C
to 48ms. The tolerance of the capacitor must be taken into
account to calculate the total variation in the delay time.
DC(H1)
Delay
RESET
Delay time =
.
= 0.1µF, Delay time (ms) = 32ms ± 50%: i.e. 16ms
Delay time = C
output transistor to go to the OFF (open) state
RESET
RESET
C
Delay
Delay
RT(OFF)
pulse is generated following
´ V
function is calculated from
´ 3.2 ´ 10
(1) = No Delay Capacitor
(2) = With Delay Capacitor
(3) = Max: RESET Voltage (1.0V)
I
Delay
Charge
. The Delay capacitor is
Threshold
V
DIS
5