FTM-9412P-F10 Fiberxon, FTM-9412P-F10 Datasheet - Page 9

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FTM-9412P-F10

Manufacturer Part Number
FTM-9412P-F10
Description
(FTM-9412P-x10xx) SFF GE-PON Px10 ONU Transceiver
Manufacturer
Fiberxon
Datasheet
Figure 5 shows the recommended interface scheme for FTM-9412P-K10DC
Note A: Open emitter output internally.
Note B: LVPECL output, AC coupled internally.
Note C: Fiberxon reserve the two-wire debug port for module tuning.
Pin Definitions
2×5/2×10 SFF planform in Figure 6 below shows the pin information of electrical interface and mounting studs.
Functions are described in Table 8 and Table 9 with some accompanying notes.
SFF GE-PON PX10 ONU Transceiver
10km transmission
GE-PON MAC
PON_TX_DISABLE
(DO NOT connect these pins to any circuit on host board)
Input stage in SerDes IC is assumed with high impedance and internal bias to Vcc-1.3V
R1=R2=82Ω,R3=R4=130Ω,R5=N.C
Input stage in SerDes IC is assumed without internal bias to Vcc-1.3V
R1=R2=R3=R4=N.C, R5=100Ω
TX_DISABLE
PON_LOS
Fiberxon Proprietary and Confidential, Do Not Copy or Distribute
SerDes
Figure 5 Recommended Interface Circuit (FTM-9412P-K10DC)
RXN
RXP
TXP
TXN
(Note A)
10uF
R5
R3
R1
Equipment
Fiberxon
0.1uF
Tuning
(Note B)
R2
R4
4.7-10KΩ
+3.3V
FTM-9412P-F10/F10E/F10i/F10U/F10DC
FTM-9412P-K10/K10E/K10i/K10U/K10DC
Preliminary Data Sheet
Page 9 of 15
2x1uH
10uF
Z=50Ω
Z=50Ω
+3.3V
Z=50Ω
Z=50Ω
DEBUG_PORT#2 (20)
DEBUG_PORT#1 (19)
0.1uF
130
82
0.1uF
(Note C)
LAS_nFAIL(18)
TX_BRST(17)
TX_DIS(13)
V
V
130
82
EET
EER
RD+(10)
+3.3V
V
TD+(14)
TD-(15)
V
RD-(9)
(12,16)
CCT
(2,3,6)
SD(8)
CCR
(11)
(7)
+3.3V
+3.3V
10KΩ
10KΩ
FTM-9412P-K10DC
2x150Ω
Doc No: DS3493000-3a
Amplifier
Limiting
Driver
Laser
BM
CM
Aug.9, 2005

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