CY7C425-10JC Cypress Semiconductor Corp, CY7C425-10JC Datasheet - Page 5
![IC ASYNC FIFO MEM 1KX9 32-PLCC](/photos/6/51/65138/428-32-plcc_sml.jpg)
CY7C425-10JC
Manufacturer Part Number
CY7C425-10JC
Description
IC ASYNC FIFO MEM 1KX9 32-PLCC
Manufacturer
Cypress Semiconductor Corp
Series
CY7Cr
Datasheet
1.CY7C421-20JXC.pdf
(17 pages)
Specifications of CY7C425-10JC
Function
Asynchronous
Memory Size
9K (1K x 9)
Data Rate
50MHz
Access Time
8ns
Voltage - Supply
3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1227
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C425-10JC
Manufacturer:
CYPRESS
Quantity:
1 831
Company:
Part Number:
CY7C425-10JC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Switching Characteristics
Document #: 38-06001 Rev. *C
Notes
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
7. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V and output loading of the specified I
8. See the last page of this specification for Group A subgroup testing information.
9. t
10. t
Parameter
RC
A
RR
PR
LZR
DVR
HZR
WC
PW
HWZ
WR
SD
HD
MRSC
PMR
RMR
RPW
WPW
RTC
PRT
RTR
EFL
HFH
FFH
REF
RFF
WEF
WFF
WHF
RHF
RAE
RPE
WAF
WPF
XOL
XOH
as in part (a) of AC Test Load and Waveforms, unless otherwise specified.
±100 mV from the steady state.
HZR
HZR
[6,9]
[6,9,10]
[9,10]
[6,9]
transition is measured at +200 mV from V
and t
DVR
Read Cycle Time
Access Time
Read Recovery Time
Read Pulse Width
Read LOW to Low Z
Data Valid After Read HIGH
Read HIGH to High Z
Write Cycle Time
Write Pulse Width
Write HIGH to Low Z
Write Recovery Time
Data Set-Up Time
Data Hold Time
MR Cycle Time
MR Pulse Width
MR Recovery Time
Read HIGH to MR HIGH
Write HIGH to MR HIGH
Retransmit Cycle Time
Retransmit Pulse Width
Retransmit Recovery Time
MR to EF LOW
MR to HF HIGH
MR to FF HIGH
Read LOW to EF LOW
Read HIGH to FF HIGH
Write HIGH to EF HIGH
Write LOW to FF LOW
Write LOW to HF LOW
Read HIGH to HF HIGH
Effective Read from Write HIGH
Effective Read Pulse Width After EF HIGH
Effective Write from Read HIGH
Effective Write Pulse Width After FF HIGH
Expansion Out LOW Delay from Clock
Expansion Out HIGH Delay from Clock
use capacitance loading as in part (b) of AC Test Load and Waveforms.
Description
Over the Operating Range
OL
and –200 mV from V
OH
. t
Min
DVR
20
10
10
20
10
10
20
10
10
10
10
20
10
10
10
10
3
5
5
6
0
[7, 8]
–10
transition is measured at the 1.5V level. t
Max
10
15
20
20
20
10
10
10
10
10
10
10
10
10
10
Min
25
10
15
25
15
10
25
15
10
15
15
25
15
10
15
15
3
5
5
8
0
–15
Max
15
15
25
25
25
15
15
15
15
15
15
15
15
15
15
Min
30
10
20
30
20
10
12
30
20
10
20
20
30
20
10
20
20
3
5
5
0
–20
CY7C419/21/25/29/33
HWZ
Max
20
15
30
30
30
20
20
20
20
20
20
20
20
20
20
OL
and t
/I
OH
LZR
and 30 pF load capacitance,
Min
35
10
25
35
25
10
15
35
25
10
25
25
35
25
10
25
25
3
5
5
0
transition is measured at
–25
Max
25
18
35
35
35
25
25
25
25
25
25
25
25
25
25
Page 5 of 17
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
[+] Feedback