AD9042 Analog Devices, Inc., AD9042 Datasheet

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AD9042

Manufacturer Part Number
AD9042
Description
12-bit, 41 Msps Monolithic A/d Converter
Manufacturer
Analog Devices, Inc.
Datasheet

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a
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
PRODUCT DESCRIPTION
The AD9042 is a high speed, high performance, low power,
monolithic 12-bit analog-to-digital converter. All necessary
functions, including track-and-hold (T/H) and reference are
included on chip to provide a complete conversion solution.
The AD9042 runs off of a single +5 V supply and provides
CMOS-compatible digital outputs at 41 MSPS.
Designed specifically to address the needs of wideband,
multichannel receivers, the AD9042 maintains 80 dB
spurious-free dynamic range (SFDR) over a bandwidth of
20 MHz. Noise performance is also exceptional; typical
signal-to-noise ratio is 68 dB.
The AD9042 is built on Analog Devices’ high speed complemen-
tary bipolar process (XFCB) and uses an innovative multipass
architecture. Units are packaged in a 28-pin DIP; this custom
FEATURES
41 MSPS Minimum Sample Rate
80 dB Spurious-Free Dynamic Range
595 mW Power Dissipation
Single +5 V Supply
On-Chip T/H and Reference
Twos Complement Output Format
CMOS-Compatible Output Levels
APPLICATIONS
Cellular/PCS Base Stations
GPS Anti-Jamming Receivers
Communications Receivers
Spectrum Analyzers
Electro-Optics
Medical Imaging
ATE
AD9042AD PIN DESIGNATIONS
ENCODE
ENCODE
V
OFFSET
DV
AV
AV
V
GND
GND
GND
GND
GND
GND
AIN
REF
CC
CC
CC
10
11
12
13
14
NC = NO CONNECT
1
2
3
4
5
6
7
8
9
(Not to Scale)
TOP VIEW
AD9042
27
26
25
24
23
22
20
19
18
17
16
15
28
21
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0 (LSB)
NC
NC
D11 (MSB)
cofired ceramic package forms a multilayer substrate to which
internal bypass capacitors and the 9042 die are attached and a
44-pin TQFP low profile surface mount package. The AD9042
industrial grade is specified from –40 C to +85 C. However,
the AD9042 was designed to perform over the full military
temperature range (–55 C to +125 C); consult factory for
military grade product options.
PRODUCT HIGHLIGHTS
1. Guaranteed sample rate is 41 MSPS.
2. Dynamic performance specified over entire Nyquist band;
3. Low power dissipation: 595 mW off a single +5 V supply.
4. Reference and track-and-hold included on chip.
5. Packaged in 28-pin ceramic DIP and 44-pin TQFP.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
ENCODE
ENCODE
V
OFFSET
spurious signals typ. 80 dBc for –1 dBFS input signals.
V
AIN
REF
ENCODE
ENCODE
V
OFFSET
AV
DV
DV
V
GND
GND
REF
AIN
C1
CC
CC
CC
REFERENCE
Monolithic A/D Converter
10
11
1
2
3
4
5
6
7
8
9
A1
INTERNAL
AD9042AST PIN DESIGNATIONS
FUNCTIONAL BLOCK DIAGRAM
TIMING
+2.4V
GND
12 13 14 15 16 17 18 19 20 21 22
44
PIN 1
TH1
43
AV
MSB
42
CC
D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
ADC
41
NC = NO CONNECT
TH2
(Not to Scale)
TOP VIEW
40 39 38
AD9042
DIGITAL ERROR CORRECTION LOGIC
6
12-Bit, 41 MSPS
DAC
DV
CC
37
© Analog Devices, Inc., 1996
TH3
36 35 34
AD9042
AD9042
A2
Fax: 617/326-8703
ADC
33
32
31
30
29
28
27
26
24
23
25
D8
D7
D6
D5
D4
D3
D2
D1
D0 (LSB)
GND
NC
7
LSB

Related parts for AD9042

AD9042 Summary of contents

Page 1

... All necessary functions, including track-and-hold (T/H) and reference are included on chip to provide a complete conversion solution. The AD9042 runs off of a single +5 V supply and provides CMOS-compatible digital outputs at 41 MSPS. Designed specifically to address the needs of wideband, multichannel receivers, the AD9042 maintains 80 dB spurious-free dynamic range (SFDR) over a bandwidth of 20 MHz. Noise performance is also exceptional ...

Page 2

... REF OFFSET 3 ENCODE driven by single-ended source; ENCODE bypassed to ground through 0.01 F capacitor. 4 ENCODE may also be driven differentially in conjunction with ENCODE; see “Encoding the AD9042” for details. Specifications subject to change without notice. SWITCHING SPECIFICATIONS Parameter (Conditions) Maximum Conversion Rate Minimum Conversion Rate ...

Page 3

... Transient Response Overvoltage Recovery Time NOTES 1 All ac specifications tested by driving ENCODE and ENCODE differentially; see “ENCODING the AD9042” for details (Pin 10 on AD9042AST only) tied to GND through 0.01 F capacitor. 3 Analog input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). ...

Page 4

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD9042 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality ...

Page 5

... REF 10 through 50 resistor 15 18–27 28 NOTE 1 Output coded as twos complement. AD9042 CUSTOM 28-PIN DIP PACKAGE –5– AD9042 AD9042AD PIN DESCRIPTIONS Name Function GND Ground Power Supply (Digital). CC Powers output stage only. GND Ground. ENCODE Encode input. Data conversion initiated on rising edge ...

Page 6

... AD9042 DIE LAYOUT AND MECHANICAL INFORMATION Die Dimensions . . . . . . . . . . . . . . . . 155 Pad Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Metalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Aluminum Backing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . None Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2,605 Passivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oxynitride Die Attach . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Silver Filled Bond Wire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gold DIE LAYOUT W/PAD LABELS DEFINITION OF SPECIFICATIONS Analog Bandwidth The analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced ...

Page 7

... Figure 5. Digital Output Stage 2.4V 0.5mA Figure 6. 2.4 V Reference +5V 2,12,14 0.1µF 10k 28 200kHz 8 D11 AIN SINEWAVE 9 V OFFSET 49 REF 4 ENCODE TTL CLOCK OSC ENCODE D0 17 1,3,6,7,11,13 PIN BYPASSED TO GND REF WITH A 0.1µF CAPACITOR. PINS 15,16 ARE NOT CONNECTED. Figure 7. AD9042AD Burn-In Diagram V REF +5V ...

Page 8

... AD9042–Typical Performance Characteristics 0 –20 –40 – –80 –100 –120 dc 4.1 8.2 12.3 FREQUENCY – MHz Figure 8. Single Tone at 1.2 MHz 0 –20 –40 – –80 –100 –120 dc 4.1 8.2 12.3 FREQUENCY – MHz Figure 9. Single Tone at 9.6 MHz 0 ENCODE = 41 MSPS –20 AIN = 19.5MHz – ...

Page 9

... AIN = 19.5MHz 50 SFDR = 80dB 40 REFERENCE LINE dBc –80 –70 –60 –50 –40 –30 ANALOG INPUT POWER LEVEL – dBFS Figure 15. AD9042AD Single Tone SFDR 100 ENCODE = 41 MSPS 19.3MHz F2 = 19.51MHz 50 SFDR = 80dB 40 REFERENCE LINE –80 –70 – ...

Page 10

... AD9042 0 ENCODE = 41 MSPS AIN = 19.5MHz @ –29 dBFS –20 NO DITHER –40 – –80 –100 –120 dc 4.1 8.2 12.3 FREQUENCY – MHz Figure 20. 4K FFT without Dither 100 90 ENCODE = 41 MSPS 80 AIN = 19.5MHz NO DITHER SFDR = 80dB 10 REFERENCE LINE 0 –80 –70 –60 –50 – ...

Page 11

... CMOS-compatible, coded as twos complement. APPLYING THE AD9042 Encoding the AD9042 The AD9042 is designed to interface with TTL and CMOS logic families. The source used to drive the ENCODE pin(s) must be clean and free from jitter. Sources with excessive jitter will limit SNR (ref. Equation 1 under “Noise Floor and SNR”). ...

Page 12

... Driving the Analog Input Because the AD9042 operates off of a single +5 V supply, the analog input range is offset from ground by 2.4 volts. The analog input, AIN operational amplifier configured in an inverting mode (ref. Equivalent Circuits: Analog Input Stage). ...

Page 13

... To minimize capacitive loading, there should only be one gate on each output pin. An example of this is shown in the evaluation board schematics shown in Figures 37 and 38. The digital outputs of the AD9042 have a unique constant slew rate output stage. The output slew rate is about 1 V/ns independent of output loading. A typical CMOS gate combined with PCB trace and through hole will have a load of approxi- mately 10 pF ...

Page 14

... Data is latched in a pipeline configuration; a rising edge generates the new AD9042 data sample, latches the previous data at the converter output, and strobes the external data register over J3. Power and ground must be applied power the digital logic section of the evaluation board ...

Page 15

... C13 C15 C16 0.1µF 0.1µF 0.1µF Figure 38. AD9042ST/PCB Schematic Table II. AD9042ST/PCB Bill of Material Description Banana Jack Ceramic Chip Capacitor 0805, 0.1 F Tantalum Chip Capacitor 10 F 40-Pin Double Row Male Header BNC Coaxial PCB Connector Surface Mount Resistor 1206, 60.4 ohms Surface Mount Resistor 1206, 499 ohms Surface Mount Resistor 1206, 49 ...

Page 16

... R10 R11 R12 R13 Figure 40. AD9042D/PCB Bottom Side Silk Screen M3 C12 C11 a © 1995 USA JB8/KU8 Figure 41. AD9042D/PCB Top Side Copper (Negative) R15 Figure 42. AD9042D/PCB Bottom Side Copper (Negative) –16– REV. A ...

Page 17

... C18 Figure 43. AD9042ST/PCB Top Side Silk Screen Figure 44. AD9042ST/PCB Bottom Side Silk Screen REV. A Figure 45. AD9042ST/PCB Top Side Copper (Negative) Figure 46. AD9042ST/PCB Bottom Side Copper (Positive) –17– AD9042 ...

Page 18

... AD9042 Figure 47. AD9042ST/PCB Grounded Layer (Negative) +5VA Figure 48. AD9042ST/PCB “Split” Power Layer (Negative) –18– +5V REV. A ...

Page 19

... I and Q components separated. These functions are realizable through DSP techniques, however several key technology breakthroughs are required: high dynamic range ADCs such as the AD9042, new DSPs (highly programmable with onboard memory, fast), digital tuner & filter (with programmable frequency and BW) and wide band mixers (high dynamic range with > ...

Page 20

... Figure 52. Simplified 5 MHz Wideband “A” Carrier Receiver System Requirements Figure 52 shows a typical wideband receiver subsystem based around the AD9042. This strip consists of a wideband IF filter, amplifier, ADC, latches, channelizer and interface to a digital signal processor. This design shows a typical clocking scheme used in many receiver designs ...

Page 21

... For example kHz AMPS signal is being digitized with an AD9042 sampling at 40.96 MSPS, the ratio would be 0.030 MHz/20.48 MHz. Expressed in log form, the processing gain is –10 log (0.030 MHz / 20.48 MHz ...

Page 22

... Multitone Performance The plot below shows the AD9042 in a worst case scenario of four strong tones spaced fairly close together. In this plot no dither was used, and the converter still maintained 85 dBFS of spurious-free range. As illustrated previously, a modest amount ...

Page 23

... The high dynamic range and excellent noise performance of the AD9042 enable higher image quality medical ultrasound systems. Figure 58 shows the AD9042 used in one channel of the receive chain of a medical ultrasound system. The AD604 receives its input directly from the transducer, or from an external preamp connected to the transducer ...

Page 24

... BSC SQ 0.030 (0.75) 0.018 (0.45 SEATING PLANE TOP VIEW (PINS DOWN) 11 0.006 (0.15) 0.039 12 0.002 (0.05) (1.00) REF 0.018 (0.45) 0.031 (0.80) 0.008 (0.20) BSC 0.012 (0.30) 0.003 (0.09) AD9042AD OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Pin Hermetic Ceramic DIP (DH-28 0.595 0.010 (15.11 0.25 0.050 0.010 1.400 0.014 (1.27 0.25) (35.56 0.35) 0.150 (3.81) MIN 0 ...

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