AD9878-EB Analog Devices, Inc., AD9878-EB Datasheet - Page 8

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AD9878-EB

Manufacturer Part Number
AD9878-EB
Description
Mixed-signal Front End For Broadband Applications
Manufacturer
Analog Devices, Inc.
Datasheet
AD9878
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions
Pin No.
1, 21, 70
2, 22, 71
3
4 to 14
15
16 to 19
20
23
24, 33, 35, 39
25, 34, 36, 40
26
27
28 to 32
37
38
41
42
43
(MSB) IF12(11)
(MSB) IF10(4)
Mnemonic
DRGND
DRVDD
(MSB) IF12(11)
IF12[10:0]
(MSB) IF10(4)
IF10[3:0]
RxSYNC
MCLK
DVDD
DGND
TxSYNC
(MSB) TxIQ(5)
TxIQ[4:0]
PROFILE
RESET
SCLK
CS
SDIO
RxSYNC
IF12(10)
DRGND
DRGND
DRVDD
DRVDD
IF12(9)
IF12(8)
IF12(7)
IF12(6)
IF12(5)
IF12(4)
IF12(3)
IF12(2)
IF12(1)
IF12(0)
IF10(3)
IF10(2)
IF10(1)
IF10(0)
DGND
MCLK
DVDD
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
100
26
99
27
98
28
12-Bit ADC Digital Ouput
10-Bit ADC Digital Ouput
Descriptions
Pin Driver Digital Ground
Pin Driver Digital 3.3 V Supply
12-Bit ADC Digital Ouput
10-Bit ADC Digital Ouput
Sync Output, 10-Bit and 12-Bit ADCs
Master Clock Output
Digital 3.3 V Supply
Digital Ground
Sync Input for Transmit Port
Digital Input for Transmit Port
Digital Input for Transmit Port
Profile Selection Input
Chip Reset Input
SPORT Clock
SPORT Chip Select
SPORT Data I/O
97
29
96
30
95
31
94
32
93
33
Figure 2. Pin Configuration
92
34
Rev. A | Page 8 of 36
91
35
90
36
(Not to Scale)
AD9878
TOP VIEW
89
37
88
38
87
39
86
40
85
41
84
42
83
43
82
44
81
45
80
46
79
47
78
48
77
49
76
50
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
REFT10
REFB10
AGND10
AVDD10
DRVDD
DRGND
REFCLK
SIGDELT
FLAG1
FLAG2
CA_EN
CA_DATA
CA_CLK
DVDDOSC
OSCIN
XTAL
DGNDOSC
AGNDPLL
PLLFILT
AVDDPLL
DVDDPLL
DGNDPLL
AVDDTx
Tx+
Tx–

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