AD9257BCPZRL7-65 Analog Devices, Inc., AD9257BCPZRL7-65 Datasheet - Page 27
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AD9257BCPZRL7-65
Manufacturer Part Number
AD9257BCPZRL7-65
Description
Octal, 14-bit, 40/65 Msps, Serial Lvds, 1.8 V Analog-to-digital Converter
Manufacturer
Analog Devices, Inc.
Datasheet
1.AD9257BCPZRL7-65.pdf
(40 pages)
- Current page: 27 of 40
- Download datasheet (2Mb)
Data Sheet
BUILT-IN OUTPUT TEST MODES
The
verification of the integrity of each data output channel, as well
as to facilitate board level debugging. Various output test options
are provided to place predictable values on the outputs of the
AD9257.
OUTPUT TEST MODES
The output test options are described in Table 17 at Address 0x0D.
When an output test mode is enabled, the analog section of the
AD9257
includes a built-in test feature designed to enable
Rev. 0 | Page 27 of 40
ADC is disconnected from the digital back-end blocks and the
test pattern is run through the output formatting block. Some of
the test patterns are subject to output formatting, and some are
not. The PN generators from the PN sequence tests can be reset
by setting Bit 4 or Bit 5 of Register 0x0D. These tests can be
performed with or without an analog signal (if present, the
analog signal is ignored), but they do require an encode clock.
For more information, see the
Interfacing to High Speed ADCs via SPI.
AN-877
Application Note,
AD9257
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