TS87C58X2-VCCD Atmel Corporation, TS87C58X2-VCCD Datasheet - Page 18
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TS87C58X2-VCCD
Manufacturer Part Number
TS87C58X2-VCCD
Description
8-bit CMOS Microcontroller 16/32 Kbytes ROM/OTP
Manufacturer
Atmel Corporation
Datasheet
1.TS87C58X2-VCCD.pdf
(58 pages)
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TS80C54X2/C58X2
TS87C54X2/C58X2
6.4 TS80C54/58X2 Serial I/O Port
The serial I/O port in the TS80C54/58X2 is compatible with the serial I/O port in the 80C52.
It provides both synchronous and asynchronous communication modes. It operates as an Universal Asynchronous
Receiver and Transmitter (UART) in three full-duplex modes (Modes 1, 2 and 3). Asynchronous transmission and
reception can occur simultaneously and at different baud rates
Serial I/O port includes the following enhancements:
6.4.1 Framing Error Detection
Framing bit error detection is provided for the three asynchronous modes (modes 1, 2 and 3). To enable the framing
bit error detection feature, set SMOD0 bit in PCON register (See Figure 6).
When this feature is enabled, the receiver checks each incoming data frame for a valid stop bit. An invalid stop
bit may result from noise on the serial lines or from simultaneous transmission by two CPUs. If a valid stop bit
is not found, the Framing Error bit (FE) in SCON register (See Table 8.) bit is set.
18
Framing error detection
Automatic address recognition
SM0/FE
SMOD1
SMOD0
SM1
Figure 6. Framing Error Block Diagram
SM2
-
REN
Set FE bit if stop bit is 0 (framing error) (SMOD0 = 1)
SM0 to UART mode control (SMOD = 0)
POF
To UART framing error control
TB8
GF1
RB8
GF0
PD
TI
IDL
RI
SCON (98h)
PCON (87h)
Rev. C - 15 January, 2001
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