TS87C58X2-VCCR Atmel Corporation, TS87C58X2-VCCR Datasheet - Page 25
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TS87C58X2-VCCR
Manufacturer Part Number
TS87C58X2-VCCR
Description
8-bit CMOS Microcontroller 16/32 Kbytes ROM/OTP
Manufacturer
Atmel Corporation
Datasheet
1.TS87C58X2-VCCR.pdf
(58 pages)
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A low-priority interrupt can be interrupted by a high priority interrupt, but not by another low-priority interrupt.
A high-priority interrupt can’t be interrupted by any other interrupt source.
If two interrupt requests of different priority levels are received simultaneously, the request of higher priority level
is serviced. If interrupt requests of the same priority level are received simultaneously, an internal polling sequence
determines which request is serviced. Thus within each priority level there is a second priority structure determined
by the polling sequence.
IE - Interrupt Enable Register (A8h)
Reset Value = 0X00 0000b
Bit addressable
Rev. C - 15 January, 2001
Number
Bit
EA
7
6
5
4
3
2
1
0
7
Mnemonic
IPH.x
EX1
EX0
ET2
ET1
ET0
Bit
EA
ES
-
0
0
1
1
6
-
Enable All interrupt bit
enable bit.
Reserved
Timer 2 overflow interrupt Enable bit
Serial port Enable bit
Timer 1 overflow interrupt Enable bit
External interrupt 1 Enable bit
Timer 0 overflow interrupt Enable bit
External interrupt 0 Enable bit
Clear to disable all interrupts.
Set to enable all interrupts.
If EA=1, each interrupt source is individually enabled or disabled by setting or clearing its own interrupt
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Clear to disable timer 2 overflow interrupt.
Set to enable timer 2 overflow interrupt.
Clear to disable serial port interrupt.
Set to enable serial port interrupt.
Clear to disable timer 1 overflow interrupt.
Set to enable timer 1 overflow interrupt.
Clear to disable external interrupt 1.
Set to enable external interrupt 1.
Clear to disable timer 0 overflow interrupt.
Set to enable timer 0 overflow interrupt.
Clear to disable external interrupt 0.
Set to enable external interrupt 0.
ET2
5
Table 10. Priority Level Bit Values
Table 11. IE Register
ES
4
IP.x
0
1
0
1
ET1
3
Description
EX1
2
TS80C54X2/C58X2
TS87C54X2/C58X2
Interrupt Level Priority
3 (Highest)
ET0
0 (Lowest)
1
1
2
EX0
0
25
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