74HCT107D,652 NXP Semiconductors, 74HCT107D,652 Datasheet

IC DUAL JK F-F NEG-EDGE 14-SOIC

74HCT107D,652

Manufacturer Part Number
74HCT107D,652
Description
IC DUAL JK F-F NEG-EDGE 14-SOIC
Manufacturer
NXP Semiconductors
Series
74HCTr
Type
JK Typer

Specifications of 74HCT107D,652

Output Type
Differential
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Function
Reset
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
66MHz
Delay Time - Propagation
20ns
Trigger Type
Negative Edge
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
HCT
Logic Type
J-K Negative Edge Triggered Flip Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
16 ns
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
4.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2763-5
933713930652
Product specification
File under Integrated Circuits, IC06
DATA SHEET
74HC/HCT107
Dual JK flip-flop with reset;
negative-edge trigger
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
INTEGRATED CIRCUITS
December 1990

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74HCT107D,652 Summary of contents

Page 1

DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT107 Dual JK flip-flop with reset; negative-edge trigger Product specification File under ...

Page 2

Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger FEATURES Output capability: standard I category: flip-flops CC GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in ...

Page 3

Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger PIN DESCRIPTION PIN NO. SYMBOL 1J, 2J GND 12, 9 1CP, 2CP 13, 10 1R, 2R ...

Page 4

Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger Fig.4 Functional diagram. FUNCTION TABLE OPERATING MODE asynchronous reset toggle load “0” (reset) load “1” (set) hold “no change” Note HIGH voltage level h = HIGH voltage level ...

Page 5

Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger DC CHARACTERISTICS FOR 74HC For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” Output capability: standard I category: flip-flops CC AC CHARACTERISTICS FOR 74HC GND = ...

Page 6

Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger DC CHARACTERISTICS FOR 74HCT For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications” Output capability: standard I category: flip-flops CC Note to HCT types The value of additional quiescent supply current ...

Page 7

Philips Semiconductors Dual JK flip-flop with reset; negative-edge trigger AC WAVEFORMS The shaded areas indicate when the input is permitted to change for predictable output performance GND ...

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