M220Z1-L02 Chi Mei, M220Z1-L02 Datasheet - Page 15

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M220Z1-L02

Manufacturer Part Number
M220Z1-L02
Description
LCD Module
Manufacturer
Chi Mei
Datasheet
6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
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The input signal timing specifications are shown as the following table and timing diagram.
Note:(1) Because this module is operated by DE only mode, Hsync and Vsync input signals should be
LVDS Clock
LVDS Data
Vertical Active Display Term
Horizontal Active Display Term
set to low logic level or ground. Otherwise, this module would operate abnormally.
Signal
INPUT SIGNAL TIMING DIAGRAM
Frequency
Period
High Time
Low Time
Setup Time
Hold Time
Frame Rate
Total
Display
Blank
Total
Display
Blank
Item
Symbol
15 / 26
Tlvh
Tlvs
Tvd
Tvb
Thd
Thb
Tch
Tcl
Th
Fc
Tv
Tc
Fr
Th-Thd
Tv-Tvd
1060
1050
Min.
13.4
600
600
890
840
50
-
-
-
1080
1050
59.5
16.8
Typ.
920
840
4/7
3/7
60
30
80
-
-
Th-Thd
Tv-Tvd
Max.
1195
1050
1000
840
76
82
-
-
-
-
-
Issued Date: Sep. 11, 2006
DOC No.: 14067720
Model No.: M220Z1-L02
MHz
Unit
Hz
Th
Th
Th
ns
ps
ps
Tc
Tc
Tc
Tc
Tc
Th=Thd+Thb
Tv=Tvd+Tvb
Approval
Version 2.0
Note
-
-
-
-
-
-
-
-
-
-

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