AD5235 Analog Devices, AD5235 Datasheet - Page 4

• Manufacturer Part Number: AD5235
• Description: 8-Bit Dual Nonvolatile Memory Digital Potentiometer
• Manufacturer: Analog Devices

Nonvolatile Memory Digital Potentiometers
Absolute Maximum Rating (
noted)
V
V
V
V
A
O
Digital Inputs & Output Voltage to GND .................. 0V, +7V
Operating Temperature Range......................... -40°C to +85°C
Maximum Junction Temperature (T
Storage Temperature ..................................... -65°C to +150°C
Lead Temperature (Soldering, 10 sec)..........................+300°C
Thermal Resistance
Ordering Guide
Model
AD5235BRU25
AD5235BRU250 X2/250
The AD5235 contains 16,000 transistors.
Die size: 100 x 105 mil = 10,500 sq. mil
REV PrD 6 NOV, 2000
Information contained in this Product Concept data sheet describes a product in the early definition stage. There is no guarantee that the
information contained here will become a final product in its present form. For latest information contact Walt Heinzer/Analog Devices, Santa Clara,
CA. TEL[phone]; FAX [phone]; [e-mail]
X
DD
SS
DD
A
x
, V
to GND...................................................................0V, V
– B
to GND ................................................................. 0V, -7V
to V
to GND..............................................................-0.3, +7V
B
X
TSSOP-16...................................................... 180°C/W
, V
, A
SS
W
Package Power Dissipation = (T J MAX - T A ) / JA
......................................................................... +7V
X
to GND ................................................. V
– W
#CHs/
k Ohm
X2/25
X
, B
JA,
X
– W
Temp
Range
-40/+85°C TSSOP-16
-40/+85°C TSSOP-16
X
...................................... ±20mA
PRELIMINARY TECHNICAL DATA
J MAX
T
Package
Description Option
A
= +25°C, unless otherwise
)...................+150°C
Package
RU-16
RU-16
SS
, V
DD
DD
4
AD5235 PIN FUNCTION DESCRIPTION
#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
CLK
SDI
SDO
GND
V
A1
W1
B1
B2
W2
A2
V
WP
PR
CS
RDY
SS
DD
AD5235
Description
Serial Input Register clock pin. Shifts in one bit at
a time on positive clock edges.
Serial Data Input Pin. Shifts in one bit at a time
on positive clock CLK edges.
Serial Data Output Pin. Open Drain Output
requires external pull-up resistor. Commands 9
and 10 activate the SDO output. See Instruction
operation Truth Table. Table 2.
Ground pin, logic ground reference
Negative Supply. Connect to zero volts for single
supply applications.
A terminal of RDAC1.
Wiper terminal of RDAC1,
ADDR(RDAC1) = 0
B terminal of RDAC1.
B terminal of RDAC2.
Wiper terminal of RDAC2,
ADDR(RDAC3) = 1
A terminal of RDAC2.
Positive Power Supply Pin. Should be
input-logic HIGH voltage.
Write Protect Pin. Prevents any changes to the
present EEMEM contents when active low.
Hardware over ride preset pin. Refreshes the
scratch pad register with current contents of the
EEMEM register. Factory default loads midscale
512
Serial Register chip select active low. Serial
register operation takes place when CS returns to
logic high.
Ready. Active-high open drain output. Identifies
completion of commands 2, 3, 8, 9, 10.
10
SDO
GND
CLK
SDI
.
V
W1
A1
B1
SS
PIN CONFIGURATION
1
2
3
4
5
6
7
8
H
H
16
15
14
13
12
11
10
9
.
.
RDY
CS
CS
PR
PR
WP
WP
V
A2
W2
B2
CS
CS
PR
PR
WP
WP
DD
AD5235
the