AD565 Analog Devices, AD565 Datasheet - Page 4

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AD565

Manufacturer Part Number
AD565
Description
High Speed 12-Bit Monolithic D/A Converters
Manufacturer
Analog Devices
Datasheet

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AD566A–SPECIFICATIONS
Model
DATA INPUTS
TTL or 5 Volt CMOS
RESOLUTION
OUTPUT
ACCURACY (Error Relative to
DIFFERENTIAL NONLINEARITY
TEMPERATURE COEFFICIENTS
SETTLING TIME TO 1/2 LSB
FULL-SCALE TRANSITION
POWER REQUIREMENTS
POWER SUPPLY GAIN SENSITIVITY
PROGRAMMABLE OUTPUT RANGES
EXTERNAL ADJUSTMENTS
REFERENCE INPUT
POWER DISSIPATION
MULTIPLYING MODE PERFORMANCE (All Models)
CONTROL AMPLIFIER
NOTES
1
2
Specifications subject to change without notice.
The digital input levels are guaranteed but not tested over the temperature range.
The power supply gain sensitivity is tested in reference to a V
Input Voltage
Logic Current (Each Bit)
Current
Resistance (Exclusive of Span Resistors)
Offset
Capacitance
Compliance Voltage
Full Scale) +25°C
T
+25°C
T
All Bits ON-to-OFF or OFF-to-ON (Figure 8)
10% to 90% Delay plus Rise Time
90% to 10% Delay plus Fall Time
V
V
Gain Error with Fixed 50 Ω
Bipolar Zero Error with Fixed
Gain Adjustment Range (Figure 3)
Bipolar Zero Adjustment Range
Input Impedance
Quadrants
Reference Voltage
Accuracy
Reference Feedthrough (Unipolar Mode,
Output Slew Rate 10%–90%
Output Settling Time (All Bits ON and a 0 V–10 V
Full Power Bandwidth
Small-Signal Closed-Loop Bandwidth
(see Figures 3, 4, 5)
EE
EE
MIN
MIN
Unipolar (All Bits On)
Bit ON Logic “1”
Bit OFF Logic “0”
Bit ON Logic “1”
Bit OFF Logic “0”
Bipolar (All Bits On or Off)
Unipolar (Adjustable to Zero per Figure 3)
Bipolar (Figure 4, R1 and R2 = 50 Ω Fixed)
T
Unipolar Zero
Bipolar Zero
Gain (Full Scale)
Differential Nonlinearity
Resistor for R2 (Figure 3)
50 Ω Resistor for R1 (Figure 4)
All Bits OFF, and 1 V to +10 V [p-p], Sine Wave
Frequency for 1/2 LSB [p-p] Feedthrough)
Step Change in Reference Voltage)
, –11.4 to –16.5 V dc
= –11.4 to –16.5 V dc
MIN
to T
to T
to T
MAX
MAX
MAX
1
(Pins 13 to 24)
90%–10%
2
EE
of –1.5 V dc.
Min
+2.0
0
–1.6
6
–1.5
MONOTONICITY GUARANTEED
± 0.25
± 0.15
15
0.8
(T
A
= +25 C, V
AD566AJ
–2.0
± 1.0
8
0.01
0.05
25
± 1/4
(0.006)
± 1/2
(0.012)
± 1/2
1
5
7
2
250
15
30
–12
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
± 0.1
± 0.05
20
180
Two (2): Bipolar Operation at Digital Input Only
+1 V to +10 V, Unipolar
10 Bits (± 0.05% of Reduced F.S.) for 1 V dc Reference Voltage
40 kHz typ
5 mA/µs
1 mA/µs
1.5 µs to 0.01% F.S.
300 kHz
1.8 MHz
Typ
+120
+35
–4–
EE
= –15 V, unless otherwise noted)
Max
+5.5
+0.8
+300
+100
12
–2.4
10
0.05
0.15
+10
(0.012)
(0.018)
2
10
10
350
30
50
–18
25
25
300
1.2
1/2
3/4
3/4
0.25
0.15
Min
+2.0
0
–1.6
6
–1.5
MONOTONICITY GUARANTEED
± 0.25
± 0.15
15
0.8
AD566AK
Typ
+120
+35
–2.0
± 1.0
8
0.01
0.05
25
± 1/8
(0.003)
± 1/4
(0.006)
± 1/4
1
5
3
2
250
15
30
–12
15
0 to +5
–2.5 to +2.5
0 to +10
–5 to +5
–10 to +10
± 0.1
± 0.05
20
180
Max
+5.5
+0.8
+300
+100
12
–2.4
10
0.05
0.1
+10
(0.006)
(0.012)
2
10
5
350
30
50
–18
25
25
300
1.2
1/4
1/2
1/2
0.25
0.1
Units
V
V
µA
µA
Bits
mA
mA
kΩ
% of F.S. Range
% of F.S. Range
pF
V
LSB
% of F.S. Range
LSB
% of F.S. Range
LSB
ppm/°C
ppm/°C
ppm/°C
ppm/°C
ns
ns
ns
mA
ppm of F.S./%
V
V
V
V
V
% of F.S. Range
% of F.S. Range
% of F.S. Range
% of F.S. Range
kΩ
mW
REV. D

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