AD588TQ Analog Devices, AD588TQ Datasheet - Page 5

• Manufacturer Part Number: AD588TQ
• Description: High Precision Voltage Reference
• Manufacturer: Analog Devices

Range
+10 V
–5 V or +5 V
–10 V
+5 V
–5 V
*Unbuffered outputs should not be loaded.
Figure 2b shows GAIN and BALANCE trims in a +5 V and
–5 V tracking configuration. A 100 kΩ 20-turn potentiometer is
used for each trim. The potentiometer for GAIN trim is con-
nected between Pin 6 (V
connected to Pin 5 (GAIN ADJ). The potentiometer is adjusted
to produce exactly 10 V between Pin 1 and Pin 15, the amplifier
outputs. The BALANCE potentiometer, also connected between
Pin 6 and Pin 8 with the wiper to Pin 12 (BAL ADJ), is then
adjusted to center the span from +5 V to –5 V.
Trimming in other configurations works in exactly the same
manner. When producing +10 V and +5 V, GAIN ADJ is used
to trim +10 V and BAL ADJ is used to trim +5 V. In the –10 V
and –5 V configuration, GAIN ADJ is again used to trim the
magnitude of the span, –10 V, while BAL ADJ is used to trim
the center tap, –5 V.
In single output configurations, GAIN ADJ is used to trim outputs
utilizing the full span (+10 V or –10 V), while BAL ADJ is used
to trim outputs using half the span (+5 V or –5 V).
Input impedance on both the GAIN ADJ and BAL ADJ pins is
approximately 150 kΩ. The GAIN ADJUST trim network
effectively attenuates the 10 V across the trim potentiometer
by a factor of about 1500 to provide a trim range of –3.5 mV to
+7.5 mV with a resolution of approximately 550 µV/turn
(20-turn potentiometer). The BAL ADJ trim network attenu-
ates the trim voltage by a factor of about 1400, providing a
trim range of ± 4.5 mV with resolution of 450 µV/turn.
REV. D
Connect
Pin 10
to Pin:
8
11
6
11
11
HIGH
–10 V
Unbuffered* Output on Pins
8
) and Pin 8 (V
–5 V
8
11
8
LOW
0 V
8
6
11
) with the wiper
+5 V
11
6
6
Table I. Pin Connections
+10 V
6
–5–
GAIN ADJUST
Buffered
Output
Connections
11 to 13, 14 to 15
6 to 4, and 3 to 1
8 to 13, 14 to 15,
6 to 4, and 3 to 1
8 to 13, 14 to 15,
11 to 4, and 3 to 1 1
6 to 4 and 3 to 1
8 to 13 and 14 to 15
R3
100k
20T
R3
GROUND
SYSTEM
R
1 F
B
R2
GROUND
SYSTEM
R
A2
B
R2
BALANCE
A2
ADJUST
Figure 2b. +5 V and –5 V Outputs
A1
100k
NOISE
REDUCTION
R1
20T
A1
R1
Figure 2a. +10 V Output
Buffered Output on Pins
–10 V
R4
R5
R4
R5
R6
R6
–5 V
15
15
15
AD588
A3
A4
AD588
A3
A4
0 V
+V
–V
S
+V
+15V
S
–V
S
S
+5 V
15
1
1
AD588
0.1 F
0.1 F
0.1 F
0.1 F
+10 V
1
GROUND
GROUND
SYSTEM
SYSTEM
+5V
+10V
+15V
–15V
–5V
–15V
–15V
+5V