AS1156 austriamicrosystems AG, AS1156 Datasheet - Page 13

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AS1156

Manufacturer Part Number
AS1156
Description
Single/Dual LVDS Driver
Manufacturer
austriamicrosystems AG
Datasheet
AS1156/AS1154
Data Sheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
10 Package Drawings and Markings
The AS1156/AS1154 is available in a 8-pin SOIC package.
Figure 23. 8-pin SOIC Package
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Notes:
1. Lead coplanarity should be 0 to 0.10mm (.004”) max.
2. Package surface finishing:
3. All dimensions excluding mold flashes and end flash from the pack-
4. Details of pin #1 mark are optional but must be located within the
- Top, matte (charmilles #18-30)
- All sides, matte (charmilles +18-30)
- Bottom, smooth or matte (charmilles +18-30)
age body shall not exceed 0.25mm (.010”) per side.
area indicated.
Revision 1.01
Symbol
ZD
A1
A2
A
B
C
D
E
H
e
h
L
α
1.52
0.10
1.37
0.36
0.19
4.80
3.81
5.80
0.25
0.41
Min
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1.27BSC
0.53REF
Max
1.72
0.25
1.57
0.46
0.25
4.98
3.99
6.20
0.50
1.27
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