LT1640 Linear Technology, LT1640 Datasheet - Page 10

• Manufacturer Part Number: LT1640
• Description: Negative Voltage Hot Swap Controller
• Manufacturer: Linear Technology

APPLICATIONS
supply input. The UV and OV pins are internally connected
to analog comparators with 20mV of hysteresis. When the
UV pin falls below its threshold or the OV pin rises above
its threshold, the GATE pin is immediately pulled low. The
GATE pin will be held low until UV is high and OV is low.
The undervoltage and overvoltage trip voltages can be
programmed using a three resistor divider as shown in
Figure 10a. With R4 = 562k, R5 = 9.09k and R6 = 10K, the
undervoltage threshold is set to 37V and the overvoltage
threshold is set to 71V. The resistor divider will also gain
up the 20mV hysteresis at the UV pin and OV pin to 0.6V
and 1.2V at the input respectively.
More hysteresis can be added to the UV threshold by
connecting resistor R3 between the UV pin and the GATE
pin as shown in Figure 10b.
The new threshold voltage when the input moves from low
to high is:
where V
The new threshold voltage when the input moves from
high to low is:
where V
The new hysteresis value will be:
With R1 = 562k, R2 = 16.9k and R3 = 1.62M, V
135mV and V
will be 43V (from low to high) and 37.6V (from high to
low). The hysteresis is 5.4V. A separate resistor divider
should be used to set the overvoltage threshold given by:
LT1640L/LT1640H
10
V
V
UV HL
HYS
V
V
UV LH
OV
,
,
UVH
UVL
V
V
UVHY
V
OVH
UVL
V
UVH
is typically 1.223V.
is typically 1.243V.
UVHY
R
R
R
4
R
2
2
R
2
•
•
5
U
R
= 20mV, the undervoltage threshold
R
R
•
R
3
3
5
3
R
R
R R
R R
INFORMATION
R
2
2
U
1
R R
1
2
•
•
1
•
•
R
R
•
•
R
3
3
3
3
3
3
R R
R R
1
R R
1
W
•
1
•
•
2
2
2
–
V
V
GATE
GATE
U
GATE
•
•
R
R
R
R
3
1
3
1
=
With R4 = 506k, R5 = 8.87k and V
overvoltage threshold will be 71V.
PWRGD/PWRGD Output
The PWRGD/PWRGD output can be used to directly en-
able a power module when the input voltage to the module
is within tolerance. The LT1640L has a PWRGD output for
modules with an active low enable input, and the LT1640H
has a PWRGD output for modules with an active high
enable input.
When the DRAIN voltage of the LT1640H is high with
respect to V
turned off and R7 and Q2 clamp the PWRGD pin one diode
drop ( 0.7V) above the DRAIN pin. Transistor Q2 sinks
the module’s pull-up current and the module turns off.
When the DRAIN voltage drops below V
shorting the bottom of R7 to V
UV
UV
OV
– 48V
GND
= 37.6V
= 43V
= 71V
Figure 10a. Undervoltage and Overvoltage Sensing
V
V
UV
OV
8.87k
506k
1%
1%
= 1.223
= 1.223
R4
R5
Figure 10b. Programmable Hysteresis
for Undervoltage Detection
EE
16.9k
(Figure 11), the internal transistor Q3 is
562k
R4 + R5+ R6
R4 + R5+ R6
1%
1%
R1
R2
R5 + R6
R6
– 48V
GND
1.62M
1%
R3
R4
R5
R6
2
3
OV
UV
V
V
DD
EE
EE
4
8
0.02
3
2
5%
R1
and turning Q2 off. The
LT1640L /LT1640H
UV
OV
SENSE
LT1640H
LT1640L
5
OVH
PG
V
V
DD
EE
4
, Q3 will turn on,
8
= 1.223V, the
C1
0.033 F
24V
1640 F10a
IRF530
GATE
Q1
6
R6
10
5%
1640 F10b