LT1720 Linear Technology, LT1720 Datasheet - Page 8

• Manufacturer Part Number: LT1720
• Description: 4ns/ 150MHz Dual Comparator with Independent Input/Output Supplies
• Manufacturer: Linear Technology

APPLICATIONS
LT1720/LT1721
However, with the 2V/ns slew rate of the LT1720/LT1721
outputs, a 4mV step can be created at a 100
source with only 0.02pF of output to input coupling. The
pinouts of the LT1720/LT1721 have been arranged to
minimize problems by placing the most sensitive inputs
(inverting) away from the outputs, shielded by the power
rails. The input and output traces of the circuit board
should also be separated, and the requisite level of
isolation is readily achieved if a topside ground plane runs
between the outputs and the inputs. For multilayer boards
where the ground plane is internal, a topside ground or
supply trace should be run between the inputs and
outputs, as illustrated in Figure 1.
Figure 1a shows a typical topside layout of the LT1720 on
such a multilayer board. Shown is the topside metal etch
including traces, pin escape vias, and the land pads for an
SO-8 LT1720 and its adjacent X7R 10nF bypass capacitor
in a 1206 case.
The ground trace from Pin 5 runs under the device up to
the bypass capacitor, shielding the inputs from the
outputs. Note the use of a common via for the LT1720 and
the bypass capacitor, which minimizes interference from
high frequency energy running around the ground plane or
power distribution traces.
Figure 1b shows a typical topside layout of the LT1721 on
a multilayer board. In this case, the power and ground
traces have been extended to the bottom of the device
solely to act as high frequency shields between input and
output traces.
Although both V
the LT1721, they must be shorted together externally as
well in order for both to function as shields. The same is
true for the two GND pins.
8
Figure 1. Typical Topside Metal for Multilayer PCB Layouts
(a)
CC
pins are electrically shorted internal to
U
INFORMATION
U
W
(b)
1720/21 F01
U
input
The supply bypass should include an adjacent
10nF ceramic capacitor and a 2.2 F tantalum capacitor no
farther than 5cm away; use more capacitance if driving
more than 4mA loads. To prevent oscillations, it is helpful
to balance the impedance at the inverting and noninverting
inputs; source impedances should be kept low, preferably
1k or less.
The outputs of the LT1720/LT1721 are capable of very
high slew rates. To prevent overshoot, ringing and other
problems with transmission line effects, keep the output
traces shorter than 10cm, or be sure to terminate the lines
to maintain signal integrity. The LT1720/LT1721 can drive
DC terminations of 250 or more, but lower characteristic
impedance traces can be driven with series termination or
AC termination topologies.
Hysteresis
The LT1720/LT1721 include internal hysteresis, which
makes them easier to use than many other comparable
speed comparators.
The input-output transfer characteristic is illustrated in
Figure 2 showing the definitions of V
upon the two measurable trip points. The hysteresis band
makes the LT1720/LT1721 well behaved, even with slowly
moving inputs.
V
OL
Figure 2. Hysteresis I/O Characteristics
V
TRIP
V
OS
–
=
0
V
(= V
TRIP
TRIP
+
+ V
2
V
HYST
+
TRIP
– V
TRIP
–
V
HYST
–
)
/2
V
TRIP
OS
+
and V
V
IN
V
OH
= V
1720/21 F02
HYST
IN
+
– V
IN
based
–