LTC1196-1BC Linear Technology, LTC1196-1BC Datasheet - Page 14

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LTC1196-1BC

Manufacturer Part Number
LTC1196-1BC
Description
8-Bit/ SO-8/ 1MSPS ADCs with Auto-Shutdown Options
Manufacturer
Linear Technology
Datasheet

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LTC1196/LTC1198
14
A
OVERVIEW
The LTC1196/LTC1198 are 600ns sampling 8-bit A/D
converters packaged in tiny 8-pin SO packages and oper-
ating on 3V to 6V supplies. The ADCs draw only 10mW
from a 3V supply or 50mW from a 5V supply.
Both the LTC1196 and the LTC1198 contain an 8-bit,
switched-capacitor ADC, a sample-and-hold, and a serial
port (see Block Diagram). The on-chip sample-and-holds
have full-accuracy input bandwidths of 1MHz. Although
they share the same basic design, the LTC1196 and
LTC1198 differ in some respects. The LTC1196 has a
differential input and has an external reference input pin.
It can measure signals floating on a DC common-mode
voltage and can operate with reduced spans below 1V. The
PPLICATI
D
CLK
D
OUT
CS
IN
D
CLK
OUT
CS
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY.
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER CLOCKS ARE APPLIED WITH CS LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY.
B0
O
START
U
t
SMPL
t
suCS
S
SGL/
DIFF
HI-Z
Figure 2. LTC1198 Operating Sequence Example: Differential Inputs (CH 1, CH 0)
Hi-Z
I FOR ATIO
U
ODD/
SIGN
t
suCS
t
SMPL
NULL BITS
DUMMY
W
(2.5CLKs)
DUMMY
Figure 1. LTC1196 Operating Sequence
B7
NULL BITS
U
t
CONV
B6
(8.5 CLKs)
t
CYC
B5
t
CYC
B7
(12 CLKs)
(16 CLKs)
LTC1198 has a 2-channel input multiplexer and can con-
vert either channel with respect to ground or the difference
between the two. It also automatically powers down when
not performing conversion, drawing only leakage current.
SERIAL INTERFACE
The LTC1196/LTC1198 will interface via three or four
wires to ASICs, PLDs, microprocessors, DSPs, or shift
registers (see Operating Sequence in Figures 1 and 2). To
run at their fastest conversion rates (600ns), they must be
clocked at 14.4MHz. HC logic families and any high speed
ASIC or PLD will easily interface to the ADCs at that speed
(see Data Transfer and Typical Application sections). Full
speed operation from a 3V supply can still be achieved with
3V ASICs, PLDs or HC logic circuits.
B4
B6
t
CONV
(8.5CLKs)
B3
t
dDO
B5
DON’T CARE
B2
B4
B1
B3
t
dDO
B0*
B2
t
SMPL
B1
Hi-Z
B0*
1196/98 F01
NULL
BITS
POWER
1196/98 F02
DOWN
Hi-Z

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