LTC1412 Linear Technology, LTC1412 Datasheet - Page 12

• Manufacturer Part Number: LTC1412
• Description: 12-Bit/ 3Msps/ Sampling A/D Converter
• Manufacturer: Linear Technology

APPLICATIONS
LTC1412
The V
shown in Figure 9. This is useful in applications where the
peak input signal amplitude may vary. The input span of
the ADC can then be adjusted to match the peak input
signal, maximizing the signal-to-noise ratio. The filtering
of the internal LTC1412 reference amplifier will limit the
bandwidth and settling time of this circuit. A settling time
of 5ms should be allowed for after a reference adjustment.
Differential Inputs
The LTC1412 has a unique differential sample-and-hold
circuit that allows rail-to-rail inputs. The ADC will always
convert the difference of A
common mode voltage. The common mode rejection
holds up to extremely high frequencies, see Figure 10. The
only requirement is that both inputs cannot exceed the
AV
errors (INL) and differential nonlinearity errors (DNL) are
independent of the common mode voltage, however, the
bipolar zero error (BZE) will vary. The change in BZE is
typically less than 0.1% of the common mode voltage.
Dynamic performance is also affected by the common
12
DD
Figure 8b. Using the LT1019-2.5 as an External Reference
or AV
REF
LT1019A-2.5
pin can be driven with a DAC or other means
V
5V
SS
IN
V
OUT
Figure 9. Driving V
power supply voltages. Integral nonlinearity
LTC1450
U
ANALOG INPUT
DIFFERENTIAL
ANALOG INPUT
INFORMATION
1.25V TO 3V
U
IN
1.25V TO 3V
+
– (A
REF
10 F
10 F
with a DAC
IN
W
1
2
3
4
5
–
1
2
3
4
5
) independent of the
A
A
V
REFCOMP
AGND
A
A
V
REFCOMP
AGND
IN
IN
REF
IN
IN
REF
+
–
+
–
LTC1412
LTC1412
U
1412 F08b
1412 F09
mode voltage. THD will degrade as the inputs approach
either power supply rail, from – 86dB with a common
mode of 0V to –75dB with a common mode of 2.5V
or – 2.5V.
Full-Scale and Offset Adjustment
Figure 11a shows the ideal input/output characteristics for
the LTC1412. The code transitions occur midway between
successive integer LSB values (i.e., – FS/2 + 0.5LSB,
– FS/2 + 1.5LSB, – FS/2 + 2.5LSB,...FS/2 – 1.5LSB, FS/2 –
0.5LSB). The output is two’s complement binary with
1LSB = FS – (– FS)/4096 = 5V/4096 = 1.22mV.
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero. Offset
error must be adjusted before full-scale error. Figure 11b
shows the extra components required for full-scale error
adjustment. Zero offset is achieved by adjusting the offset
applied to the A
Figure 11a. LTC1412 Transfer Characteristics
–100
–120
– 20
– 40
– 60
– 80
111...111
111...110
111...101
000...010
000...001
000...000
0
Figure 10. CMRR vs Input Frequency
1k
FS – 1LSB
IN
–
10k
RIPPLE FREQUENCY (Hz)
input. For zero offset error apply
INPUT VOLTAGE (V)
100k
V
SS
1M
V
DGND
DD
1412 G08
FS – 1LSB
10M
1412 F11a