LTC1430A Linear Technology, LTC1430A Datasheet - Page 10

• Manufacturer Part Number: LTC1430A
• Description: High Power Step-Down Switching Regulator Controller
• Manufacturer: Linear Technology

LTC1430A
scheme. In 5V input designs where an auxiliary 12V supply
is available to power PV
with R
good results. The current drawn from this supply varies
with the MOSFETs used and the LTC1430A’s operating
frequency, but is generally less than 50mA.
LTC1430A designs that use a doubler charge pump to
generate gate drive for Q1 and run from PV
below 7V cannot provide enough gate drive voltage to fully
enhance standard power MOSFETs. When run from 5V, a
doubler circuit may work with standard MOSFETs, but the
MOSFET R
the FETs and costing efficiency. Logic level FETs are a
better choice for 5V PV
enhanced with a doubler charge pump and will operate at
maximum efficiency. Doubler designs running from PV
voltages near 4V will begin to run into efficiency problems
even with logic level FETs; such designs should be built
with tripler charge pumps (see Figure 7) or with newer,
super low threshold MOSFETs. Note that doubler charge
pump designs running from more than 7V and all tripler
charge pump designs should include a zener clamp diode
D
absolute maximum rating at that pin.
Once the threshold voltage has been selected, R
be chosen based on input and output voltage, allowable
power dissipation and maximum required output current.
In a typical LTC1430A buck converter circuit operating in
continuous mode, the average inductor current is equal to
10
A
Z
PPLICATI
at PV
D
12V
1N5242
10 F
Z
DS(ON)
LTC1430A
CC1
PV
ON
1N5817
CC2
specified at V
may be quite high, raising the dissipation in
to prevent transients from exceeding the
Figure 7. Tripling Charge Pump
O
PV
1N5817
CC1
U
G1
G2
S
CC1
CC
I FOR ATIO
GS
0.1 F
and PV
U
systems; they can be fully
= 5V or 6V can be used with
1N5817
0.1 F
CC2
PV
W
, standard MOSFETs
CC
Q1
Q2
L1
CC
ON
+
U
voltages
should
C
OUT
1430 • F07
V
OUT
CC
the output load current. This current is always flowing
through either Q1 or Q2 with the power dissipation split up
according to the duty cycle:
The R
calculated by rearranging the relation P = I
P
efficiency. A typical high efficiency circuit designed for 5V
in, 3.3V at 10A out might require no more than 3%
efficiency loss at full load for each MOSFET. Assuming
roughly 90% efficiency at this current level, this gives a
P
a required R
Note that the required R
Q1 in this example. This application might specify a single
0.03 device for Q2 and parallel two more of the same
devices to form Q1. Note also that while the required R
values suggest large MOSFETs, the dissipation numbers
MAX
MAX
DC (Q1) =
DC (Q2) = 1 –
R
R
R
R
ON
ON
ON
ON
ON
value of (3.3V)(10A/0.9)(0.03) = 1.1W per FET and
should be calculated based primarily on required
(Q1) =
(Q2) =
(Q1) =
(Q2) =
required for a given conduction loss can now be
=
ON
=
=
(V
V
V
of:
(3.3V)(10A
(5V – 3.3V)(10A
DC(Q1)(I
DC(Q2)(I
V
(V
OUT
IN
(5V)(1.1W)
IN
V
IN
IN
P
P
V
V
OUT
V
– V
(5V)(1.1W)
(P
V
MAX
MAX
IN
OUT
IN
– V
IN
MAX
(P
OUT
(I
ON
(Q1)
(Q2)
MAX
MAX
OUT
MAX
MAX
)(Q1)
)
for Q2 is roughly twice that of
2
)(I
)
2
)(Q2)
)
2
2
= 0.017
)
)
MAX
2
)
2
= 0.032
)
2
R:
ON