LTC1664 Linear Technology, LTC1664 Datasheet - Page 6

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LTC1664

Manufacturer Part Number
LTC1664
Description
Micropower Quad 10-Bit DAC
Manufacturer
Linear Technology
Datasheet

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LTC1664
PIN
GND (Pin 1): System Ground.
V
The output range is
REF (Pin 6): Reference Voltage Input. 0V V
CS/LD (Pin 7): Serial Interface Chip Select/Load Input.
When CS/LD is low, SCK is enabled for shifting data on D
into the register. When CS/LD is pulled high, SCK is
disabled and data is loaded from the shift register into the
specified DAC register(s), updating the analog output(s).
CMOS and TTL compatible.
SCK (Pin 8): Serial Interface Clock Input. CMOS and TTL
compatible.
6
OUT A
0
U
to
FUNCTIONS
to V
1023
1024
OUT D
U
V
(Pins 2–5): DAC Analog Voltage Outputs.
REF
U
REF
V
CC
IN
.
D
is shifted into the 16-bit register on the rising edge of SCK.
CMOS and TTL compatible.
D
on D
May be tied to D
operaton. CMOS and TTL compatible.
CLR (Pin 11): Asynchronous Clear Input. All internal shift
and DAC registers are cleared to zero at the falling edge of
the CLR signal, forcing the analog outputs to zero scale.
CMOS and TTL compatible.
NC (Pins 12–15): Make no electrical connection to these
pins.
V
CC
IN
OUT
(Pin 9): Serial Interface Data Input. Data on the D
(Pin 16): Supply Voltage Input. 2.7V V
OUT
(Pin 10): Serial Interface Data Output. Data appears
16 positive SCK edges after being applied to D
IN
of another serial device for daisy-chain
CC
5.5V.
IN
pin
IN
.

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