LTC2238 Linear, LTC2238 Datasheet
LTC2238
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LTC2238 Summary of contents
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... DESCRIPTIO The LTC 40Msps/25Msps, low power 3V A/D converters designed for digitizing high frequency, wide dynamic range signals. The LTC2238/LTC2237/LTC2236 are perfect for demand- ing imaging and communications applications with AC performance that includes 61.8dB SNR and 85dB SFDR Range for signals at the Nyquist frequency. ...
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... Analog Input Voltage (Note 3) ..... –0. Digital Input Voltage .................... –0. Digital Output Voltage ................ –0.3V to (OV Power Dissipation ............................................ 1500mW Operating Temperature Range LTC2238C, LTC2237C, LTC2236C ........... 0°C to 70°C LTC2238I, LTC2237I, LTC2236I ..........–40°C to 85°C Storage Temperature Range ..................–65°C to 125° VERTER CHARACTERISTICS ...
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... Single Ended Input (Note 7) + – 0V < < < SENSE < 1V Figure 8 Test Circuit The ● denotes the specifications which apply over the full operating temperature range, = –1dBFS. (Note 4) IN LTC2238 MIN TYP MAX 61.8 ● ● ● 60 61.8 61.7 61.6 85 ● ● ● ...
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... LTC2238/LTC2237/LTC2236 TER AL REFERE CE CHARACTERISTICS PARAMETER V Output Voltage CM V Output Tempco CM V Line Regulation CM V Output Resistance DIGITAL I PUTS A D DIGITAL OUTPUTS full operating temperature range, otherwise specifications are at T SYMBOL PARAMETER LOGIC INPUTS (CLK, OE, SHDN) V High Level Input Voltage ...
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... Note 3: When these pin voltages are taken below GND or above V will be clamped by internal diodes. This product can handle input currents of greater than 100mA below GND or above V DD Note 3V 65MHz (LTC2238), 40MHz (LTC2237 SAMPLE 25MHz (LTC2236), input range = 2V with differential drive, unless P-P otherwise noted ...
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... FREQUENCY (MHz) 223876 G04 LTC2238: 8192 Point 2-Tone FFT 28.2MHz and 26.8MHz, IN –1dB, 2V Range, 65Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 0 5 ...
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... SAMPLE RATE (Msps) LTC2237: Typical DNL, 2V Range, 40Msps 1.00 0.75 0.50 0.25 0 –0.25 –0.50 –0.75 –1.00 0 256 512 768 CODE LTC2238: SNR vs Input Level 30MHz, 2V Range, 65Msps dBFS 60 50 dBc –60 –50 –40 –20 –30 INPUT LEVEL (dBFS) 223876 G11 ...
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... LTC2238/LTC2237/LTC2236 W U TYPICAL PERFOR A CE CHARACTERISTICS LTC2237: 8192 Point FFT 30MHz, –1dB, 2V Range, IN 40Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 223876 G19 LTC2237: 8192 Point 2-Tone FFT 21.6MHz and 23.6MHz, IN –1dB, 2V Range, 40Msps 0 – ...
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... FREQUENCY (MHz) 223876 G34 LTC2238/LTC2237/LTC2236 LTC2237 Sample Rate, VDD 5MHz Sine Wave Input, –1dB RANGE 40 1V RANGE SAMPLE RATE (Msps) LTC2236: Typical DNL, 2V Range, 25Msps 1 ...
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... LTC2238/LTC2237/LTC2236 W U TYPICAL PERFOR A CE CHARACTERISTICS LTC2236: 8192 Point 2-Tone FFT 10.9MHz and 13.8MHz, IN –1dB, 2V Range, 25Msps 0 –10 –20 –30 –40 –50 –60 –70 –80 –90 –100 –110 –120 FREQUENCY (MHz) 223876 G37 LTC2236: SFDR vs Input Frequency, –1dB, 2V Range, ...
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... Connecting SHDN to V results in sleep mode with the outputs at high impedance. OE (Pin 11): Output Enable Pin. Refer to SHDN pin function. LTC2238/LTC2237/LTC2236 NC (Pins 12, 13, 14, 15): Do Not Connect These Pins. D0-D9 (Pins 16, 17, 18, 19, 22, 23, 24, 25, 26, 27): Digital Outputs the MSB. OGND (Pin 20): Output Driver Ground. ...
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... LTC2238/LTC2237/LTC2236 U U FUNCTIONAL BLOCK DIAGRA + A IN INPUT FIRST PIPELINED S/H ADC STAGE – 1.5V REFERENCE 2.2µF RANGE SELECT REF SENSE BUF 12 W SECOND PIPELINED THIRD PIPELINED FOURTH PIPELINED ADC STAGE ADC STAGE ADC STAGE REFH REFL INTERNAL CLOCK SIGNALS DIFF CLOCK/DUTY ...
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... DIAGRA t AP ANALOG N INPUT t H CLK – 5 D0-D9, OF LTC2238/LTC2237/LTC2236 – – – – 223876 TD01 223876fa 13 ...
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... LTC2238/LTC2237/LTC2236 U U APPLICATIO S I FOR ATIO DYNAMIC PERFORMANCE Signal-to-Noise Plus Distortion Ratio The signal-to-noise plus distortion ratio [S/(N + D)] is the ratio between the RMS amplitude of the fundamental input frequency and the RMS amplitude of all other frequency components at the ADC output. The output is band limited to frequencies above DC to below half the sampling frequency ...
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... LTC2238/LTC2237/LTC2236 W U SAMPLE/HOLD OPERATION AND INPUT DRIVE Sample/Hold Operation Figure 2 shows an equivalent circuit for the LTC2238/ LTC2237/LTC2236 CMOS differential sample-and-hold. The analog inputs are connected to the sampling capaci- tors (C SAMPLE shown attached to each input (C tion of all other capacitance associated with each input ...
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... Poor matching will result in higher even order harmonics, especially the second. Input Drive Circuits Figure 3 shows the LTC2238/LTC2237/LTC2236 being driven transformer with a center tapped second- output pin (Pin CM ary. The secondary center tap is DC biased with V setting the ADC input signal at its optimum DC level ...
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... ARE 0402 PACKAGE SIZE V CM 2.2µF 0.1µF 6.8nH + A IN 0.1µF 25Ω T1 0.1µF 25Ω – 6.8nH MA/COM, ETC 1-1-13 RESISTORS, CAPACITORS, INDUCTORS ARE 0402 PACKAGE SIZE LTC2238 LTC2237 LTC2236 223876 F06 LTC2238 LTC2237 LTC2236 223876 F07 LTC2238 LTC2237 LTC2236 223876 F08 223876fa 17 ...
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... U U APPLICATIO S I FOR ATIO Reference Operation Figure 9 shows the LTC2238/LTC2237/LTC2236 reference circuitry consisting of a 1.5V bandgap reference, a differ- ence amplifier and switching and control circuit. The inter- nal voltage reference can be configured for two pin select- able input ranges of 2V (±1V differential (±0.5V dif- ferential) ...
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... A sinusoidal clock can also be used along with a low-jitter squaring circuit before the CLK pin (see Figure 11). The noise performance of the LTC2238/LTC2237/LTC2236 can depend on the clock signal quality as much as on the analog input. Any noise present on the clock signal will result in additional aperture jitter that will be RMS summed with the inherent ADC aperture jitter ...
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... For the ADC to operate properly, the CLK signal should have a 50% (±5%) duty cycle. Each half cycle must have at least 7.3ns (LTC2238), 11.8ns (LTC2237), and 18.9ns (LTC2236) for the ADC internal circuitry to have enough settling time for proper operation. ...
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... Hi-Z state. On Off Grounding and Bypassing The LTC2238/LTC2237/LTC2236 requires a printed cir- cuit board with a clean, unbroken ground plane. A multi- layer board with an internal ground plane is recom- mended. Layout for the printed circuit board should en- sure that digital and analog signal lines are separated as much as possible ...
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... U U APPLICATIO S I FOR ATIO Heat Transfer Most of the heat generated by the LTC2238/LTC2237/ LTC2236 is transferred from the die through the bottom- side exposed pad and package leads onto the printed circuit board. For good electrical and thermal perfor- mance, the exposed pad should be soldered to a large grounded pad on the PC board ...
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... U U APPLICATIO S I FOR ATIO LTC2238/LTC2237/LTC2236 W U 223876fa 23 ...
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... LTC2238/LTC2237/LTC2236 U U APPLICATIO S I FOR ATIO Silkscreen Top Topside 223876fa ...
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... U U APPLICATIO S I FOR ATIO Inner Layer 2 GND LTC2238/LTC2237/LTC2236 W U Inner Layer 3 Power 223876fa 25 ...
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... LTC2238/LTC2237/LTC2236 U U APPLICATIO S I FOR ATIO Bottomside Silkscreen Bottom 223876fa ...
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... Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. LTC2238/LTC2237/LTC2236 U UH Package 32-Lead Plastic QFN (5mm × 5mm) (Reference LTC DWG # 05-08-1693) 0.70 ± ...
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... ADC, Lowest Power LTC2229 12-Bit, 80Msps, 3V ADC, Lowest Power LTC2236 10-Bit, 25Msps, 3V ADC, Lowest Power LTC2237 10-Bit, 40Msps, 3V ADC, Lowest Power LTC2238 10-Bit, 65Msps, 3V ADC, Lowest Power LTC2239 10-Bit, 80Msps, 3V ADC, Lowest Power LTC2245 14-Bit, 10Msps, 3V ADC, Lowest Power LTC2246 ...