LTC2925 Linear Technology, LTC2925 Datasheet - Page 9

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LTC2925

Manufacturer Part Number
LTC2925
Description
Multiple Power Supply Tracking Controller
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S I FOR ATIO
Optional External FET
Figure 7 illustrates how an optional external N-channel FET
can ramp up a single supply that becomes the master
signal. When used, the FET’s gate is tied to the GATE pin
and its source is tied to the RAMP pin. Under normal op-
eration, the GATE pin sources or sinks 10 A to ramp the
FET’s gate up or down at a rate set by the external capacitor
connected to the GATE pin.
The series FET easily controls any supply with an output
voltage between 0V and V
section for examples.
Electronic Circuit Breaker
The LTC2925 features an electronic circuit breaker func-
tion that protects the optional series FET against short
circuits. An external sense resistor is used to measure the
current flowing in the FET. If the voltage across the sense
resistor exceeds 50mV for more than a short-circuit timer
cycle, the gate of the FET is pulled low with 20mA, turning
it off.
R
R
V
R
TB1
TA1
IN
TA2
V
V
IN
IN
10k
10k
R
R
R
R
R
TB2
ONB
ONA
Figure 7. Typical Application With External FET
TB3
TA3
0.1 F
ON
REMOTE
STATUS
FAULT
V
RAMPBUF
TRACK1
TRACK2
TRACK3
GND
CC
SENSEP SENSEN
SCTMR
R
C
U
SENSE
SCTMR
LTC2925
SDTMR
10
CC
C
U
SDTMR
GATE
Q1
. See the Typical Applications
PGTMR
C
GATE
C
PGTMR
RAMP
SD1
SD3
SD2
FB1
FB2
FB3
PGI
W
MASTER
R
R
R
2925 F07
RST
RUN/SS
FB = 1.235V
RUN/SS
FB = 0.8V
RUN/SS
FB = 0.8V
FA1
FA2
FA3
MONITOR
SUPPLY
DC/DC
DC/DC
DC/DC
R
R
R
FB1
FB3
FB2
U
3.3V
3.3V
3.3V
OUT
OUT
OUT
IN
IN
IN
1.8V
SLAVE1
2.5V
SLAVE2
1.5V
SLAVE3
The short-circuit timer duration is configured by a capaci-
tor tied between SCTMR and GND. SCTMR will pull up with
50 A when SENSEP – SENSEN > 50mV. Otherwise, it pulls
down with 2 A. When the voltage at SCTMR exceeds 1.23V,
the GATE will be pulled to ground with 20mA and the FAULT
pin will be pulled low. Thus, the capacitor, C
quired to configure the short-circuit timer duration, t
is determined from:
Because the slave supplies track the RAMP pin which is
driven by the external FET, they are pulled low by the track-
ing circuit when a short-circuit fault occurs. Following a
short-circuit fault, the FET is latched off and FAULT is
pulled low until the fault is cleared by pulling the ON pin
below 0.4V. Note that the supplies will not be allowed to
ramp up again until SCTMR has been pulled below about
100mV by the 2 A pull down current source. The elec-
tronic circuit breaker supports any supply voltage between
0V and V
rent through the optional series FET, it is capable of moni-
toring other currents, including the current from a slave
supply. The Typical Applications section shows one such
example.
If the electronic circuit breaker is not used, tie SENSEP and
SENSEN to V
Power Good Timeout
The power good timeout circuit turns off the supplies if an
external supply monitor, connected to the PGI pin, fails to
indicate that all supplies have entered regulation in time
after power up begins. After power up is complete, it turns
off the supplies if any supply exits regulation.
The power good timer duration is configured by a capaci-
tor tied between PGTMR and GND. PGTMR will pull up the
C
driven above 1.23V. Once the voltage at the PGTMR ex-
ceeds 1.23V, a fault will trip if the PGI pin is low. When the
power good timeout circuit detects a fault, the GATE pin is
PGTMR
C
SCTMR
capacitor with 10 A starting when the ON pin is
CC
. Although it is normally used to monitor cur-
CC
50
and SCTMR to GND.
A t
1 23
.
SCTMR
V
www.DataSheet4U.com
LTC2925
SCTMR
SCTMR
, re-
9
2925f

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