LTC3416 Linear Technology, LTC3416 Datasheet - Page 11

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LTC3416

Manufacturer Part Number
LTC3416
Description
4A/ 4MHz/ Monolithic Synchronous Step-Down Regulator
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S I FOR ATIO
Soft-Start
The RUN/SS pin provides a means to shut down the
LTC3416 as well as a timer for soft-start. Pulling the RUN/
SS pin below 0.5V places the LTC3416 in a low quiescent
current shutdown state (I
The soft-start gradually raises the clamp on I
current range becomes available on I
on I
externally with a resistor and capacitor on the RUN/SS pin
as shown in Figure 1a. The soft-start duration can be
calculated by using the following formula:
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses: V
Efficiency = 100% – (L1 + L2 + L3 + ...)
t
TH
SS
reaches approximately 2V. The clamp on I
R C In
Figure 5. Dual Voltage System with Tracking
IN
SS SS
quiescent current and I
U
TRACK
V
IN
LTC3416
MASTER
LTC3416
SLAVE
V
– .
IN
U
Q
1 8
SGND
SGND
< 1 A).
V
V
FB
FB
V
(
Seconds
W
V
V
2
OUT2
OUT1
R losses.
TH
R5
R4
R3
R2
R1
3416 F05
after the voltage
)
TH
U
. The full
TH
is set
The V
loss at very low load currents whereas the I
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence.
1. The V
2. I
Other losses including C
losses and inductor core losses generally account for less
than 2% of the total loss.
In most applications, the LTC3416 does not dissipate
much heat due to its high efficiency. But in applications
where the LTC3416 is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such as
the DC bias current as given in the electrical character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge dQ moves from V
dQ/dt is the current out of V
than the DC bias current. In continuous mode, I
= f(Q
the internal top and bottom switches. Both the DC bias
and gate charge losses are proportional to V
their effects will be more pronounced at higher supply
voltages.
internal switches, R
continuous mode the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R
(DC) as follows:
The R
be obtained from the Typical Performance Characteris-
tics curves. Thus, to obtain I
to R
average output current.
2
R losses are calculated from the resistances of the
R
IN
SW
L
T
quiescent current loss dominates the efficiency
IN
DS(ON)
+ Q
and multiply the result by the square of the
= (R
quiescent current is due to two components:
B
) where Q
DS(ON)TOP
for both the top and bottom MOSFETs can
SW
T
)(DC) + (R
and Q
, and external inductor R
IN
IN
and C
2
DS(ON)
R losses, simply add R
to ground. The resulting
B
IN
www.DataSheet4U.com
are the gate charges of
that is typically larger
DS(ON)BOT
OUT
and the duty cycle
LTC3416
ESR dissipative
)(1 – DC)
IN
and thus
GATECHG
2
11
R loss
L
. In
3416f
SW

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