LTC3417A-1 Linear Technology, LTC3417A-1 Datasheet - Page 12

• Manufacturer Part Number: LTC3417A-1
• Description: Dual Synchronous 1.5A/1A 4MHz Step-Down DC/DC Regulator with POR
• Manufacturer: Linear Technology

APPLICATIONS INFORMATION
LTC3417A-1
In most cases, 0.1μF to 1μF of ceramic capacitors should
also be placed close to the LTC3417A-1 in parallel with
the main capacitors for high frequency decoupling.
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Because the
LTC3417 control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size. When choosing the input and output
ceramic capacitors, choose the X5R or X7R dielectric
formulations. These dielectrics have the best temperature
and voltage characteristics of all the ceramics for a given
value and size.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the V
couple to the output and be mistaken as loop instability.
At worst, the ringing at the input can be large enough to
damage the part.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must fulfi ll a charge storage re-
quirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation com-
ponents and the output capacitor size. Typically, 3 to 4
cycles are required to respond to a load step, but only in
the fi rst cycle does the output drop linearly. The output
droop, V
droop of the fi rst cycle. Thus, a good place to start is with
the output capacitor size of approximately:
12
C
OUT
≈ 2.5
DROOP
f
O
, is usually about 2 to 3 times the linear
• V
ΔI
OUT
DROOP
IN
pin. At best, this ringing can
More capacitance may be required depending on the duty
cycle and load step requirements.
In most applications, the input capacitor is merely required
to supply high frequency bypassing, since the impedance
to the supply is very low. A 10μF ceramic capacitor is
usually enough for these conditions.
Setting the Output Voltage
The LTC3417A-1 develops a 0.8V reference voltage between
the feedback pins, V
as shown in Figure 4. The output voltages are set by two
resistive dividers according to the following formulas:
Keeping the current small (<5μA) in these resistors
maximizes effi ciency, but making the current too small
may allow stray capacitance to cause noise problems and
reduce the phase margin of the error amp loop.
To improve the frequency response, a feed-forward ca-
pacitor, C
to route the V
the inductor or the SW line.
Power-On Reset
The POR pin is an open-drain output which pulls low when
either regulator is out of regulation. When both output
voltages are above –6% of regulation, a timer is started
which allows the POR output to go high after 212,992
clock cycles (when FREQ is tied to V
cycles (when FREQ is tied to ground through an external
resistor). This results in a delay of approximately 150ms
when the oscillator is set to 2MHz. When either channel
is shut down, the POR output refl ects the condition of the
running regulator.
V
V
OUT1
OUT2
F
, may also be used. Great care should be taken
0.8V 1+
0.8V 1+
FB
node away from noise sources, such as
FB1
R2
R1
R3
R4
and V
FB2
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, and the signal ground
IN
) or 294,912 clock
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