LTC3604 Linear Technology, LTC3604 Datasheet - Page 17

• Manufacturer Part Number: LTC3604
• Description: 2.5A 15V Monolithic Synchronous Step-Down Regulator
• Manufacturer: Linear Technology

Figure 5 is a temperature derating curve based on the
DC1353A demo board. It can be used to estimate the
maximum allowable ambient temperature for given DC
load currents in order to avoid exceeding the maximum
operating junction temperature of 125°C.
Junction Temperature Measurement
The junction-to-ambient thermal resistance will vary de-
pending on the size and amount of heat sinking copper on
the PCB board where the part is mounted, as well as the
amount of air fl ow on the device. One of the ways to mea-
sure the junction temperature directly is to use the internal
junction diode on one of the pins (PGOOD) to measure
its diode voltage change based on ambient temperature
change. First remove any external passive component on
the PGOOD pin, then pull out 100μA from the PGOOD pin
to turn on its internal junction diode and bias the PGOOD
pin to a negative voltage. With no output current load,
measure the PGOOD voltage at an ambient temperature
of 25°C, 75°C and 125°C to establish a slope relationship
between the delta voltage on PGOOD and delta ambient
temperature. Once this slope is established, then the junc-
tion temperature rise can be measured as a function of
power loss in the package with corresponding output load
current. Keep in mind that doing so will violate absolute
maximum voltage ratings on the PGOOD pin, however,
with the limited current, no damage will result.
APPLICATIONS INFORMATION
Figure 5. Load Current vs Ambient Temperature
3.0
2.5
2.0
1.5
1.0
0.5
0
25
50
TEMPERATURE (°C)
75
V
V
f
DC1353A
100
O
IN
OUT
= 1MHz
= 12V
= 1.8V
3604 F05
125
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3604.
1. Do the capacitors C
2. The output capacitor, C
3. The resistive divider, R1 and R2, must be connected
4. Keep sensitive components away from the SW pin. The
5. A ground plane is preferred, but if not available the
6. Flood all unused areas on all layers with copper in order
to the pins as possible? These capacitors provide the AC
current to the internal power MOSFETs and drivers. The
(–) plate of C
and the (–) plate of C
be closely connected to minimize loss. The (–) plate
of C
(–) plate of C
between the (+) plate of C
nated near SGND. The feedback signal, V
routed away from noisy components and traces such as
the SW line, and its trace length should be minimized.
In addition, RT and the loop compensation components
should be terminated to SGND.
R
components, and the INTV
be routed away from the SW trace and the inductor.
signal and power grounds should be segregated with
both connecting to a common, low noise reference
point. The point at which the ground terminals of the
V
good, low noise reference point. The connection to the
PGND pin should be made with a minimal resistance
trace from the reference point.
to reduce the temperature rise of power components.
These copper areas should be connected to the exposed
backside connection of the IC.
IN
RT
and V
OUT
resistor, the feedback resistors, the compensation
should be closely connected to PGND and the
OUT
IN
bypass capacitors are connected makes a
IN
.
should be closely connected to PGND
IN
connect to V
OUT
OUT
.
CC
OUT
, and inductor L1 should
bypass capacitor should all
and a ground line termi-
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IN
and PGND as close
LTC3604
FB
, should be
17
3604f