LTC3722-2 Linear Technology, LTC3722-2 Datasheet - Page 19
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LTC3722-2
Manufacturer Part Number
LTC3722-2
Description
Synchronous Dual Mode Phase Modulated Full Bridge Controllers
Manufacturer
Linear Technology
Datasheet
1.LTC3722-2.pdf
(28 pages)
OPERATIO
Leading Edge Blanking
The LTC3722-1/LTC3722-2 provides programmable lead-
ing edge blanking to prevent nuisance tripping of the
current sense circuitry. Leading edge blanking relieves the
filtering requirements for the CS pin, greatly improving the
response to real overcurrent conditions. It also allows the
use of a ground referenced current sense resistor or
transformer(s), further simplifying the design. With a
single 10k to 100k resistor from R
times of approximately 40ns to 320ns are programmed. If
not required, connecting R
edge blanking. Keep in mind that the use of leading edge
blanking will set a minimum linear control range for the
phase modulation circuitry.
Resistive Sensing
A resistor connected between input common and the
sources of MB and MD is the simplest method of current
sensing for the full-bridge converter. This is the preferred
method for low to moderate power levels. The sense
resistor should be chosen such that the maximum rated
output current for the converter can be delivered at the
lowest expected V
late the optimal value for R
LTC3722-1:
where: N = Transformer turns ratio
LTC3722-2:
R
I PEAK
R
P
CS
CS
(
I PEAK
270
P
270
)
(
mV
mV
2
L
V
I
OUT
O MAX
• •
O
U
N EFF
IN
(
– ( .
)
( –
1
I PEAK
. Use the following formula to calcu-
P
82 5
•
(
f
D
)
CLK
MIN
LEB
•
CS
A R
)
)
N
V
•
IN MAX
.
to V
(
L
SLOPE
MAG
REF
LEB
)
• •
•
)
can disable leading
2
f
N
N
to GND, blanking
CLK
P
S
D
MIN
Current Transformer Sensing
A current sense transformer can be used in lieu of resistive
sensing with the LTC3722-1/LTC3722-2. Current sense
transformers are available in many styles from several
manufacturers. A typical sense transformer for this appli-
cation will use a 1:50 turns ratio (N), so that the sense
resistor value is N times larger, and the secondary current
N times smaller than in the resistive sense case. Therefore,
the sense resistor power loss is about N times less with the
transformer method, neglecting the transformers core
and copper losses. The disadvantages of this approach
include, higher cost and complexity, lower accuracy, core
reset/max duty cycle limitations and lower speed. Never-
theless, for very high power applications, this method is
preferred. The sense transformer primary is placed in the
same location as the ground referenced sense resistor, or
between the upper MOSFET drains in the (MA, MC) and
V
immunity to leading edge noise spikes, since gate charge
current and reflected rectifier recovery current are largely
eliminated. Figure 11 illustrates a typical current sense
transformer based sensing scheme. R
calculated the same as in the resistive case, only its value
is increased by the sense transformer turns ratio. At high
duty cycles, it may become difficult or impossible to reset
the current transformer. This is because the required
transformer reset voltage increases as the available time
for reset decreases to equalize the (volt • seconds) applied.
The interwinding capacitance and secondary inductance
of the current sense transformer form a resonant circuit
that limits the dV/dT on the secondary of the CS trans-
former. This in turn limits the maximum achievable duty
cycle for the CS transformer. Attempts to operate beyond
this limit will cause the transformer core to “walk” and
eventually saturate, opening up the current feedback loop.
Common methods to address this limitation include:
1. Reducing the maximum duty cycle by lowering the
2. Reducing the switching frequency of the converter.
3. Employ external active reset circuitry.
IN
power transformer turns ratio.
. The advantage of the high side location is a greater
LTC3722-1/LTC3722-2
www.DataSheet4U.com
S
in this case is
19
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