LTC3835-1 Linear Technology, LTC3835-1 Datasheet - Page 20

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LTC3835-1

Manufacturer Part Number
LTC3835-1
Description
Low IQ Synchronous Step-Down Controller
Manufacturer
Linear Technology
Datasheet
www.datasheet4u.com
LTC3835-1
APPLICATIONS INFORMATION
Checking Transient Response
The regulator loop response can be checked by looking at
the load current transient response. Switching regulators
take several cycles to respond to a step in DC (resistive) load
current. When a load step occurs, V
equal to ΔI
sistance of C
C
regulator to adapt to the current change and return V
its steady-state value. During this recovery time V
monitored for excessive overshoot or ringing, which would
indicate a stability problem. OPTI-LOOP compensation allows
the transient response to be optimized over a wide range of
output capacitance and ESR values. The availability of the
I
but also provides a DC coupled and AC fi ltered closed-loop
response test point. The DC step, rise time and settling at
this test point truly refl ects the closed-loop response. As-
suming a predominantly second order system, phase margin
and/or damping factor can be estimated using the percent-
age of overshoot seen at this pin. The bandwidth can also
be estimated by examining the rise time at the pin. The I
external components shown in Figure 10 circuit will provide
an adequate starting point for most applications.
The I
loop compensation. The values can be modifi ed slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the fi nal PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be selected
because the various types and values determine the loop
gain and phase. An output current pulse of 20% to 80%
20
TH
OUT
pin not only allows optimization of control loop behavior
TH
generating the feedback error signal that forces the
series R
LOAD
OUT
(ESR), where ESR is the effective series re-
. ΔI
C
-C
LOAD
C
fi lter sets the dominant pole-zero
also begins to charge or discharge
OUT
shifts by an amount
OUT
can be
OUT
TH
to
of full-load current having a rise time of 1μs to 10μs will
produce output voltage and I
give a sense of the overall loop stability without break-
ing the feedback loop. Placing a power MOSFET directly
across the output capacitor and driving the gate with an
appropriate signal generator is a practical way to produce
a realistic load step condition. The initial output voltage
step resulting from the step change in output current may
not be within the bandwidth of the feedback loop, so this
signal cannot be used to determine phase margin. This
is why it is better to look at the I
the feedback loop and is the fi ltered and compensated
control loop response. The gain of the loop will be in-
creased by increasing R
will be increased by decreasing C
the same factor that C
will be kept the same, thereby keeping the phase shift the
same in the most critical frequency range of the feedback
loop. The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance.
A second, more severe transient is caused by switching in
loads with large (>1μF) supply bypass capacitors. The dis-
charged bypass capacitors are effectively put in parallel with
C
its delivery of current quickly enough to prevent this sudden
step change in output voltage if the load switch resistance
is low and it is driven quickly. If the ratio of C
greater than 1:50, the switch rise time should be controlled
so that the load rise time is limited to approximately 25 •
C
time, limiting the charging current to about 200mA.
OUT
LOAD
, causing a rapid drop in V
. Thus a 10μF capacitor would require a 250μs rise
C
is decreased, the zero frequency
C
and the bandwidth of the loop
TH
OUT
TH
pin waveforms that will
C
. No regulator can alter
. If R
pin signal which is in
C
is increased by
LOAD
to C
OUT
38351fc
is

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