LTC4217 Linear Technology, LTC4217 Datasheet - Page 9

• Manufacturer Part Number: LTC4217
• Description: 2A Integrated Hot Swap Controller
• Manufacturer: Linear Technology

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OPERATION
The Functional Diagram displays the main circuits of the
device. The LTC4217 is designed to turn a board’s supply
voltage on and off in a controlled manner allowing the board
to be safely inserted and removed from a live backplane.
The LTC4217 includes a 20mΩ MOSFET and a 7.5mΩ cur-
rent sense resistor. During normal operation, the charge
pump and gate driver turn on the pass MOSFET’s gate to
provide power to the load. The inrush current control is
accomplished by the INRUSH circuit. This circuit limits
the GATE ramp rate to 0.3V/ms and hence controls the
voltage ramp rate of the output capacitor.
The current sense (CS) amplifi er monitors the load current
using the voltage sensed across the current sense resistor.
The CS amplifi er limits the current in the load by reduc-
ing the GATE-to-OUT voltage in an active control loop. It
is simple to adjust the current limit threshold using the
current setting (I
during other times such as start-up.
A short circuit on the output to ground causes signifi cant
power dissipation during active current limiting. To limit
this power, the foldback amplifi er reduces the current limit
value from 2A to 0.5A in a linear manner as the FB pin drops
below 0.6V (see Typical Performance Characteristics).
If an overcurrent condition persists, the TIMER pin ramps
up with a 100μA current source until the pin voltage ex-
ceeds 1.2V (comparator TM2). This indicates to the logic
that it is time to turn off the pass MOSFET to prevent
overheating. At this point the TIMER pin ramps down us-
ing the 2μA current source until the voltage drops below
0.2V (Comparator TM1) which tells the logic to start an
internal 100ms timer. At this point, the pass transistor
has cooled and it is safe to turn it on again. It is suitable
APPLICATIONS INFORMATION
The typical LTC4217 application is in a high availability
system that uses a positive voltage supply to distribute
power to individual cards. A complete application circuit
is shown in Figure 1. External component selection is
discussed in detail in the following sections.
SET
) pin. This allows a different threshold
Turn-On Sequence
Several conditions must be present before the internal pass
MOSFET can be turned on. First the supply V
its undervoltage lockout level. Next the internally generated
supply INTV
This generates a 25μs power-on-reset pulse which clears
the fault register and initializes internal latches.
for many applications to use an internal 2ms overcurrent
timer with a 100ms cool down period. Tying the TIMER
pin to INTV
The fi xed 12V version, LTC4217-12, uses two separate
internal dividers from V
This version also features a divider from OUT to drive the
FB pin. The LTC4217-12 is available in the DFN package
while the LTC4217 (adjustable version) is in the DFN and
TSSOP packages.
The output voltage is monitored using the FB pin and the
PG comparator to determine if the power is available for
the load. The power good condition is signaled by the PG
pin using an open-drain pull-down transistor.
The Functional Diagram also shows the monitoring blocks
of the LTC4217. The two comparators on the left side
include the UV and OV comparators. These comparators
determine if the external conditions are valid prior to turning
on the MOSFET. But fi rst the undervoltage lockout circuits
UVLO1 and UVLO2 must validate the input supply and
the internally generated 3.1V supply (INTV
ate the power up initialization to the logic circuits. If the
external conditions remain valid for 100ms the MOSFET
is allowed to turn on.
Other features include MOSFET current and temperature
monitoring. The current monitor (CM) outputs a current
proportional to the sense resistor current. This current can
drive an external resistor or other circuits for monitoring
purposes. A voltage proportional to the MOSFET tempera-
ture is output to the I
allows external circuits to predict failure and shutdown
the system.
CC
CC
must cross its 2.65V undervoltage threshold.
sets this default timing.
SET
DD
pin. The MOSFET temperature
to drive the UV and OV pins.
LTC4217
DD
CC
must exceed
) and gener-
4217fb
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