LTC6603 Linear Technology, LTC6603 Datasheet - Page 10

• Manufacturer Part Number: LTC6603
• Description: Dual Adjustable Lowpass Filter
• Manufacturer: Linear Technology

LTC6603
TYPICAL PERFORMANCE CHARACTERISTICS
PIN FUNCTIONS
V+
supply must be kept free from noise and ripple. It should
be bypassed directly to a ground plane with a 0.1μF ca-
pacitor unless it is tied to V+
be as close as possible to the IC, but is not as critical as
the bypassing of V+
V+
supply must be kept free from noise and ripple. It should be
bypassed directly to a ground plane with a 0.1μF capacitor.
The bypass should be as close as possible to the IC.
V
fl oated, an internal resistive divider sets the voltage on this
pin to half the supply voltage (typically 1.5V), maximiz-
ing the dynamic range of the fi lter. If this pin is fl oated, it
must be bypassed with a quality 1μF capacitor to ground.
This pin has a typical input impedance of 3.4k and may
be overdriven. Driving this pin to a voltage other than the
default value will reduce the signal range the fi lter can
handle before clipping.
R
The value of the resistor connected between this pin and
ground determines the frequency of the master oscillator,
and sets the bias currents for the fi lter networks. The voltage
on this pin is held by the LTC6603 to approximately 1.17V.
10
OCM
BIAS
1000
IN
A
100
10
(Pin 2): Analog Voltage Supply (2.7V ≤ V ≤ 3.6V). This
1
(Pin 1): Input Voltage Supply (2.7V ≤ V ≤ 5.5V). This
10k
(Pin 4): Oscillator Frequency-Setting Resistor Input.
(Pin 3): Output common mode voltage reference. If
Integral Input Referred Noise
V
LPF1 = 1,BW = 2.5MHz
T
GAIN = 24dB
GAIN = 0dB
A
S
= 3V, R
= 25°C
GAIN = 6dB
BIAS
INTEGRATION BW (Hz)
100k
= 30.9k
A
and V+
GAIN = 12dB
1M
A
D
(Pin 2). The bypass should
(Pin16).
6603 G33
10M
1000
100
10
1
10k
Integral Input Referred Noise
V
LPF1 = 0, LPF0 = 1, BW = 625kHz
T
A
S
= 25°C
= 3V, R
BIAS
INTEGRATION BW (Hz)
100k
= 30.9k
For best performance, use a precision metal fi lm resis-
tor with a value between 30.9k and 200k and limit the
capacitance on this pin to less than 10pF . This resistor is
necessary even if an external clock is used.
CLKCNTL (Pin 5): Clock Control Input. This three-state
input selects the function of CLKIO (Pin 15). Tying the
CLKCNTL pin to ground allows the CLKIO pin to be driven
by an external clock (CLKIO is the master clock input).
If the CLKCNTL pin is fl oated, the internal oscillator is
enabled, but the master clock is not present at the CLKIO
pin (CLKIO is a no-connect). If the CLKCNTL pin is tied
to V+
master clock is present at the CLKIO pin (CLKIO is the
master clock output). To detect a fl oating CLKCNTL pin,
the LTC6603 attempts to pull the pin toward mid-supply.
This is realized with two internal 15μA current sources, one
tied to V+
and CLKCNTL. Therefore, driving the CLKCNTL pin high
requires sourcing approximately 15μA. Likewise, driving
the CLKCNTL pin low requires sinking 15μA. When the
CLKCNTL pin is fl oated, it should be bypassed by a 1nF
capacitor to ground or be surrounded by a ground shield
to prevent excessive coupling from other PCB traces.
1M
D
GAIN = 24dB
GAIN = 0dB
GAIN = 6dB
GAIN = 12dB
(Pin 16), the internal oscillator is enabled and the
D
and CLKCNTL and the other one tied to ground
6603 G34
10M
1000
100
10
1
10k
Integral Input Referred Noise
V
LPF1 = LPF0 = 0, BW = 156.25kHz
T
S
A
= 25°C
= 3V, R
BIAS
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INTEGRATION BW (Hz)
= 30.9k
100k
GAIN = 0dB
GAIN = 6dB
GAIN = 12dB
GAIN = 24dB
6603 G35
6603f
1M