25AA1024 Microchip Technology, 25AA1024 Datasheet
25AA1024
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25AA1024 Summary of contents
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... DFN package. All devices are Pb-free. Package Types (not to scale) DFN PDIP/SOIJ (MF HOLD SCK *25XX1024 is used in this document as a generic part number for the 25AA1024, 25LC1024 devices. (P, SM HOLD 6 SCK 5 SI DS21836D-page 1 ...
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... ELECTRICAL CHARACTERISTICS (†) Absolute Maximum Ratings V .............................................................................................................................................................................6.5V CC All inputs and outputs w.r.t. V ......................................................................................................... -0. Storage temperature .................................................................................................................................-65°C to 150°C Ambient temperature under bias ...............................................................................................................-40°C to 125°C ESD protection on all pins ..........................................................................................................................................4 kV † NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device ...
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... This parameter is not tested but established by characterization and qualification. For endurance estimates in a specific application, please consult the Total Endurance™ Model which can be obtained from our web site at www.microchip.com. 3: Includes T time. HI © 2007 Microchip Technology Inc. 25AA1024/25LC1024 Industrial (I -0°C to +85°C A Industrial (I -40° ...
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... TABLE 1-2: AC CHARACTERISTICS (CONTINUED) AC CHARACTERISTICS Param. Sym. Characteristic No HOLD low to output HZ High HOLD high to output valid High to Standby mode REL High to Deep power- PD down 22 T Chip erase cycle time Sector erase cycle time Internal write cycle time ...
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... SERIAL INPUT TIMING CS 2 Mode 1,1 Mode 0,0 SCK MSB in SO FIGURE 1-3: SERIAL OUTPUT TIMING SCK 13 MSB out SO SI © 2007 Microchip Technology Inc. 25AA1024/25LC1024 High-Impedance n Don’t Care High-Impedance 14 Don’t Care Preliminary ...
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... FUNCTIONAL DESCRIPTION 2.1 Principles of Operation The 25XX1024 is a 131,072 byte Serial EEPROM designed to interface directly with the Serial Peripheral Interface (SPI) port of many of today’s popular microcontroller families, including Microchip’s PIC microcontrollers. It may also interface with microcon- trollers that do not have a built-in SPI port by using discrete I/O lines programmed properly in firmware to match the SPI protocol ...
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... High-Impedance SO © 2007 Microchip Technology Inc. 25AA1024/25LC1024 The data stored in the memory at the next address can be read sequentially by continuing to provide clock pulses. The internal Address Pointer is automatically incremented to the next higher address after each byte of data is shifted out. When the highest address is ...
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... Write Sequence Prior to any attempt to write data to the 25XX1024, the write enable latch must be set by issuing the WREN instruction (Figure 2-4). This is done by setting CS low and then clocking out the proper instruction into the 25XX1024. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch ...
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... SCK Data Byte © 2007 Microchip Technology Inc. 25AA1024/25LC1024 24-bit Address Data Byte ...
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... Write Enable (WREN) and Write Disable (WRDI) The 25XX1024 contains a write enable latch. See Table 2-4 for the Write-Protect Functionality Matrix. This latch must be set before any write operation will be completed internally. The WREN instruction will set the latch, and the WRDI will reset the latch. ...
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... SI High-Impedance SO © 2007 Microchip Technology Inc. 25AA1024/25LC1024 The Write Enable Latch (WEL) bit indicates the status of the write enable latch and is read-only. When set to a ‘ 1 ’, the latch allows writes to the array, when set to a ‘ 0 ’, the latch prohibits writes to the array. The state of ...
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... Write Status Register Instruction (WRSR) The Write Status Register instruction (WRSR) allows the user to write to the nonvolatile bits in the STATUS register as shown in Table 2-2. The user is able to select one of four levels of protection for the array by writing to the appropriate bits in the STATUS register. ...
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... Microchip Technology Inc. 25AA1024/25LC1024 2.7 Power-On State The 25XX1024 powers on in the following state: • The device is in low-power Standby mode ( • The write enable latch is reset • high-impedance state • ...
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... PAGE ERASE The Page Erase function will erase all bits (FFh) inside the given page. A Write Enable (WREN) instruction must be given prior to attempting a Page Erase. This is done by setting CS low and then clocking out the proper instruction into the 25XX1024. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch ...
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... SO © 2007 Microchip Technology Inc. 25AA1024/25LC1024 CS must then be driven high after the last bit if the address or the Sector Erase will not execute. Once the CS is driven high, the self-timed Sector Erase cycle is started. The WIP bit in the STATUS register can be read to determine when the Sector Erase cycle is complete ...
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... CHIP ERASE The Chip Erase function will erase all bits (FFh) in the array. A Write Enable (WREN) instruction must be given prior to executing a Chip Erase. This is done by setting CS low and then clocking out the proper instruction into the 25XX1024. After all eight bits of the instruction are transmitted, the CS must be brought high to set the write enable latch ...
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... CS SCK SI SO © 2007 Microchip Technology Inc. 25AA1024/25LC1024 All instructions given during Deep Power-Down mode are ignored except the Read Electronic Signature Command (RDID). The RDID command will release the device from Deep power-down and outputs the electronic signature on the SO pin, and then returns ...
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... RELEASE FROM DEEP POWER- DOWN AND READ ELECTRONIC SIGNATURE Once the device has entered Deep Power-Down mode all instructions are ignored except the release from Deep Power-down and Read Electronic Signa- ture command. This command can also be used when the device is not in Deep Power-down, to read the ...
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... WP going low will have no effect on the write. © 2007 Microchip Technology Inc. 25AA1024/25LC1024 The WP pin function is blocked when the WPEN bit in the STATUS register is low. This allows the user to install the 25XX1024 in a system with WP pin grounded and still be able to write to the STATUS register ...
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... Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. DS21836D-page 20 : Example 5LC1024 e I/MF 3 0328 1L7 Example: 25AA1024 I/P e 1L7 3 0328 Example: 25LC1024 I/ 07281L7 Preliminary ...
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... Package may have one or more exposed tie bars at ends. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. © 2007 Microchip Technology Inc. 25AA1024/25LC1024 ...
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... Plastic Dual In-Line (P) – 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane ...
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... Mold Draft Angle Top Mold Draft Angle Bottom Notes: 1. SOIJ, JEITA/EIAJ Standard, formerly called SOIC. 2. § Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.25 mm per side. © 2007 Microchip Technology Inc. 25AA1024/25LC1024 β Units ...
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... APPENDIX A: REVISION HISTORY Revision C (02/2007) Revised Features Section (Self-timed Erase and Write Cycles); Revised Table 1-1 (Param. D012 and D13); Table 1-2 (Param. 20-24); Revised Package Marking Information; Replaced Package Drawings; Revised Product ID System Section (SM package). Changed PICmicro to PIC. Revision D (07/2007) Revised Features; Revised Tables 1-1 and 1-2 (added Industrial temp. and revised parameters 22-23) ...
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... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2007 Microchip Technology Inc. 25AA1024/25LC1024 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: 25AA1024/25LC1024 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...
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... Preliminary . 25AA1024T-I/ Mbit, 1.8V Serial EEPROM, Industrial temp., Tape & Reel, SOIJ package 25AA1024T-I/ Mbit, 1.8V Serial EEPROM, Industrial temp., Tape & Reel, DFN package 25LC1024-I Mbit, 2.5V Serial EEPROM, Industrial temp., P-DIP package 25LC1024T-E/ Mbit, 2.5V Serial EEPROM, Extended temp., Tape & Reel, DFN ...
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... NOTES: DS21836D-page 28 Preliminary © 2007 Microchip Technology Inc. ...
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... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Preliminary © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris ...