MBM29F016A Fujitsu Media Devices, MBM29F016A Datasheet
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MBM29F016A
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MBM29F016A Summary of contents
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... FUJITSU SEMICONDUCTOR DATA SHEET FLASH MEMORY CMOS 16M (2M MBM29F016A FEATURES • Single 5.0 V read, write, and erase Minimizes system level power requirements • Compatible with JEDEC-standard commands Pinout and software compatible with single-power supply Flash Superior inadvertent write protection • 48-pin TSOP(I) (Package Suffix: PFTN-Normal Bend Type, PFTR-Reverse Bend Type) • ...
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... MBM29F016A -70/-90/-12 PACKAGE 48-pin Plastic TSOP(I) (FPT-48P-M19) 2 Marking Side Marking Side 48-pin Plastic TSOP(I) (FPT-48P-M20) ...
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... GENERAL DESCRIPTION The MBM29F016A M-bit, 5.0 V-Only Flash memory organized bytes of 8 bits each. The 2 M bytes of data is divided into 32 sectors bytes for flexible erase capability. The 8 bit of data will appear The MBM29F016A is offered in a 48-pin TSOP(I) package. This device is designed to be programmed 7 in-system with the standard system 5 ...
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... MBM29F016A -70/-90/-12 FLEXIBLE SECTOR-ERASE ARCHITECTURE • Thirty two 64 K byte sectors • 8 sector groups each of which consists of 4 adjacent sectors in the following pattern; sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, and 28-31 • Individual-sector or multiple-sector erase capability • Sector group protection is user-definable SA31 SA30 SA29 SA28 SA3 SA2 SA1 ...
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... BLOCK DIAGRAM V RY/BY CC RY/BY V Buffer SS WE State Control RESET Command Register CE OE Low V Detector MBM29F016A MBM29F016A -70 — Erase Voltage Generator Program Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer for Address Program/Erase Latch X-Decoder -70/-90/-12 — — -90 ...
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... Side MBM29F016A 37 Standard Pinout FPT-48P-M19 25 26 (Marking Side MBM29F016A 36 Reverse Pinout FPT-48P-M20 N. RY/ ...
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... MBM29F016A Table 1 MBM29F016A Pin Configuration Pin RY/BY Hardware Reset Pin/Sector Protection RESET N. MBM29F016A User Bus Operations ...
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... MBM29F016A -70/-90/-12 ORDERING INFORMATION Standard Products Fujitsu standard products are available in several packages. The order number is formed by a combination of: MBM29F016 A -70 DEVICE NUMBER/DESCRIPTION MBM29F016 16 Mega-bit (2 M 5.0 V-only Read, Write, and Erase 64 K Byte (32 Sectors) 8 PFTN PACKAGE TYPE PFTN = 48-Pin Thin Small Outline Package ...
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... FUNCTIONAL DESCRIPTION Read Mode The MBM29F016A has two control functions which must be satisfied in order to obtain data at the outputs the power control and should be used for a device selection the output control and should be used to gate data to the output pins if a device is selected. ...
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... MBM29F016A -70/-90/-12 Table 3 MBM29F016A Sector Protection Verify Autoselect Codes Type Manufacture’ Code Device Code X X Sector Group Sector Group Protection Addresses * : Outputs 01H at protected sector addresses and outputs 00H at unprotected sector addresses SA0 0 SA1 0 SA2 0 SA3 0 SA4 ...
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... Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters. Sector Group Protection The MBM29F016A features hardware sector group protection. This feature will disable both program and erase operations in any combination of eight sector groups of memory. Each sector group consists of four adjacent sectors grouped in the following pattern: sectors 0-3, 4-7, 8-11, 12-15, 16-19, 20-23, 24-27, and 28-31 (see Table 5) ...
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... Temporary Sector Group Unprotection This feature allows temporary unprotection of previously protected sector groups of the MBM29F016A device in order to change data. The Sector Group Unprotection mode is activated by setting the RESET pin to high voltage (12 V). During this mode, formerly protected sector groups can be programmed or erased by selecting the sector group addresses ...
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... Only erase operations can convert “0”s to “1”s. Figure 16 illustrates the Embedded Programming MBM29F016A to a high voltage. However, multiplexing high 9 defined as the parity bit. ...
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... MBM29F016A -70/-90/-12 Chip Erase Chip erase is a six bus cycle operation. There are two “unlock” write cycles. These are followed by writing the “set-up” command. Two more “unlock” write cycles are then followed by the chip erase command. Chip erase does not require the user to program the device prior to erase. Upon executing the Embedded Erase Algorithm command sequence the device will automatically program and verify the entire memory for an all zero data pattern prior to electrical erase ...
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... To resume the operation of Sector Erase, the Resume command (30H) should be written. Any further writes of the Resume command at this point will be ignored. Another Erase Suspend command can be written after the chip has resumed erasing. MBM29F016A will stop toggling. The user must use the address of the 6 to determine if the erase operation has been suspended ...
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... DQ 7 Data Polling The MBM29F016A device features Data Polling as a method to indicate to the host that the embedded algorithms are in progress or completed. During the Embedded Program Algorithm, an attempt to read the device will produce the complement of the data last written attempt to read the device will produce the true data last written to DQ Algorithm, an attempt to read the device will produce a “ ...
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... DQ 6 Toggle Bit I The MBM29F016A also features the “Toggle Bit I” method to indicate to the host system that the embedded algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (OE toggling) data from the device at any address will result in DQ Erase Algorithm cycle is completed, DQ attempts ...
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... RY/BY Ready/Busy The MBM29F016A provides a RY/BY open-drain output pin as a way to indicate to the host system that the Embedded Algorithms are either in progress or has been completed. If the output is low, the device is busy with either a program or erase operation. If the output is high, the device is ready to accept any read/write or erase operation ...
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... Flash memory. Data Protection The MBM29F016A is designed to offer protection against accidental erasure or programming caused by spurious system level signals that may exist during power transitions. During power up the device automatically resets the internal state machine in the Read mode. Also, with its control register architecture, alteration of the memory contents only occurs after successful completions of specific multi-bus cycle command sequences ...
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... Supply Voltages CC MBM29F016A-70............................................................................................ +4. +5.25 V MBM29F016A-90/-12...................................................................................... +4. +5.50 V Operating ranges define those limits between which the functionality of the device is guaranteed. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges ...
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... V Figure +2.0 V Figure 2 +14.0 V +13 +0 This waveform is applied for A , OE, and RESET. 9 Figure 3 MBM29F016A Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform Maximum Positive Overshoot Waveform 2 -70/-90/-12 21 ...
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... MBM29F016A -70/-90/-12 DC CHARACTERISTICS Parameter Parameter Description Symbol I Input Leakage Current LI I Output Leakage Current OE, RESET Inputs Leakage 9 I LIT Current I V Active Current (Note 1) CC1 Active Current (Note 2) CC2 Current (Standby) CC3 Current (Standby, Reset) CC4 CC V Input Low Level ...
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... Input rise and fall times Input pulse levels: 0 3.0 V Timing measurement reference level Input: 1.5 V Output: 1.5 V Device Under Test Note including jig capacitance 100 pF including jig capacitance L MBM29F016A Test Setup — Min Max Max. IL — Max. ...
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... Min. Read Min. Toggle Bit I and Data Polling Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Min. Typ. Typ. Max. Min. Min. Min. Min. Min. Min. MBM29F016A Unit -70 -90 - 120 ...
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... RESET Hold Time Before Read RH — t Program/Erase Valid to RY/BY Delay BUSY — t EOE Notes: 1. This does not include the preprogramming time. 2. This timing is for Sector Protection operation. MBM29F016A Description Min. Min. Max. Max. -70/-90/-12 MBM29F016A Unit -70 -90 -12 500 500 500 120 ns 40 ...
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... MBM29F016A -70/-90/-12 SWITCHING WAVEFORMS • Key to Switching Waveforms Addresses High-Z Outputs Figure 5 26 WAVEFORM INPUTS OUTPUTS Must Be Will Be Steady Steady May Will Be Change Changing from from May Will Be Change Changing from from “H” or “L” Changing, ...
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... D is the output of the data written to the device. OUT 5. Figure indicates last two bus cycles of four bus cycle sequence. Figure 6 AC Waveforms for Alternate WE Controlled Program Operations MBM29F016A Data Polling PA t WHWH1 ...
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... MBM29F016A -70/-90/-12 Addresses Data 5.0 V Notes address of the memory location to be programmed data to be programmed at byte address the output of the complement of the data written to the device the output of the data written to the device. OUT 5. Figure indicates last two bus cycles of four bus cycle sequence. ...
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... GHWL WPH t DH Data AAH VCS the sector address for Sector Erase. Addresses = 555H for Chip Erase. Figure 8 AC Waveforms Chip/Sector Erase Operations MBM29F016A t AH 2AAH 555H 555H 2AAH t AS 55H 80H AAH -70/-90/-12 SA* 55H 10H/30H 29 ...
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... MBM29F016A -70/-90/- Data Data Valid Data (The device has completed the Embedded operation.) 7 Figure 9 AC Waveforms for Data Polling During Embedded Algorithm Operations CE t OEH WE t OES OE Data stops toggling (The device has completed the Embedded operation.) ...
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... CE WE RY/BY Figure 11 RY/BY Timing Diagram During Program/Erase Operations WE RESET RY/BY Figure 12 RESET, RY/BY Timing Diagram MBM29F016A The rising edge of the last WE signal Entire programming or erase operations t BUSY READY RB -70/-90/-12 31 ...
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... MBM29F016A -70/-90/- 12V VLHT 12V VLHT WE CE Data t VCS V CC SGAX = Sector Group Address for initial sector SGAY = Sector Group Address for next sector Figure 13 AC Waveforms for Sector Group Protection Timing Diagram ...
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... Suspend Erasing WE Erase Erase Suspend Read Toggle DQ and with OE Note read from the erase-suspended sector. 2 MBM29F016A Program or Erase Command Sequence Unprotection period Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure -70/-90/-12 t VLHT 5 V ...
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... MBM29F016A -70/-90/-12 EMBEDDED ALGORITHMS Increment Address Figure 16 34 Start Write Program Command Sequence (See Below) Data Polling Device No Last Address ? Yes Programming Completed Program Command Sequence (Address/Command): 555H/AAH 2AAH/55H 555H/A0H Program Address/Program Data Embedded Program TM Algorithm ...
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... Note: To insure the command has been accepted, the system software should check the status of DQ prior to and following each subsequent sector erase command the second status check, the command may not have been accepted. Figure 17 MBM29F016A Start Sequece (See Below) Individual Sector/Multiple Sector Erase Command Sequence ...
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... MBM29F016A -70/-90/-12 Note rechecked even Start Read Byte VA = Address for programming ( Any of the sector addresses Addr Yes DQ = Data Any of the sector group Yes Read Byte ( Addr Yes DQ = Data Fail Pass = “1” because DQ ...
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... No Note rechecked even “1” because changing to “1”. Figure 19 MBM29F016A Start Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes Yes Read Byte ( Addr. = “H” or “L” Toggle 6 ? Yes ...
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... MBM29F016A -70/-90/-12 Increment PLSCNT PLSCNT = 25? Remove V Write Reset Command Device Failed Figure 20 38 Start Setup Sector Group Addr PLSCNT = RESET = V IL Activate WE Pulse Time out 100 IH, (A should remain V 9 Read from Sector Group Addr ...
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... RESET = V Perform Erase or Program Operations RESET = V Temporary Sector Group Unprotection Completed Notes: 1. All Protected sector groups unprotected. 2. All previously protected sector groups are protected once again. Figure 21 Temporary Sector Group Unprotection Algorithm MBM29F016A Start ID (Note 1) IH (Note 2) -70/-90/-12 39 ...
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... MBM29F016A -70/-90/-12 ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Byte Programming Time Chip Programming Time Erase/Program Cycle TSOP(I) PIN CAPACITANCE Parameter Parameter Description Symbol C Input Capacitance IN C Output Capacitance OUT C Control Pin Capacitance IN2 Note: Test conditions T = 25° 1.0 MHz A 40 Limits Min ...
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... LEAD No. 1 INDEX 24 20.00±0.20 (.787±.008) * 18.40±0.20 (.724±.008) 0.10(.004) 19.00±0.20 (.748±.008) 1996 FUJITSU LIMITED F48029S-2C-2 C MBM29F016A *: Resin Protrusion. (Each Side:0.15(.006)MAX) 48 Details of "A" part 0.15(.006) "A" 0.15(.006) 0.25(.010 12.00±0.20 (.472±.008) 11.50REF (.460) 0.50(.0197) TYP 0.15± ...
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... MBM29F016A -70/-90/-12 (Continued) 48-pin plastic TSOP(I) (FPT-48P-M20) LEAD No. 1 INDEX 24 19.00±0.20 (.748±.008) 0.10(.004) * 18.40±0.20 (.724±.008) 20.00±0.20 (.787±.008) 1996 FUJITSU LIMITED F48030S-2C Resin Protrusion. (Each Side:0.15(.006)MAX) 48 Details of "A" part 0.15(.006) MAX "A" 0.15(.006) ...
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... Tel: (65) 281-0770 Fax: (65) 281-0220 http://www.fmap.com.sg/ F9903 FUJITSU LIMITED Printed in Japan MBM29F016A All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use ...