74ACT374SC Fairchild Semiconductor, 74ACT374SC Datasheet - Page 2

• Manufacturer Part Number: 74ACT374SC
• Description: IC FLIP FLOP OCTAL D-TYPE 20SOIC
• Manufacturer: Fairchild Semiconductor
• Series: 74ACTr
• Type: D-Type Busr

Specifications of 74ACT374SC

• Function: Standard
• Output Type: Tri-State Non Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 160MHz
• Delay Time - Propagation: 8.5ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Logic Family: ACT
• Technology: CMOS
• Number Of Bits: 8
• Number Of Elements: 1
• Clock-edge Trigger Type: Positive-Edge
• Polarity: Non-Inverting
• Operating Supply Voltage (typ): 5V
• Package Type: SOIC W
• Propagation Delay Time: 12.5ns
• Low Level Output Current: 24mA
• High Level Output Current: -24mA
• Frequency (max): 90MHz
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

©1988 Fairchild Semiconductor Corporation
74AC374, 74ACT374 Rev. 1.5.0
Connection Diagram
Pin Description
Functional Description
The AC/ACT374 consists of eight edge-triggered flip-
flops with individual D-type inputs and 3-STATE true out-
puts. The buffered clock and buffered Output Enable are
common to all flip-flops. The eight flip-flops will store the
state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP)
transition. With the Output Enable (OE) LOW, the con-
tents of the eight flip-flops are available at the outputs.
When the OE is HIGH, the outputs go to the high imped-
ance state. Operation of the OE input does not affect the
state of the flip-flops.
D
CP
OE
O
Names
0
0
–D
–O
Pin
7
7
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
Description
2
Logic Symbols
Truth Table
H
L
X
Z
LOW Voltage Level
High Impedance
Immaterial
HIGH Voltage Level
D
H
LOW-to-HIGH Transition
X
L
n
Inputs
CP
X
IEEE/IEC
OE
H
L
L
Outputs
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O
H
Z
L
n