74HCT74D,653 NXP Semiconductors, 74HCT74D,653 Datasheet - Page 11

IC FLIP FLOP DUAL D TYPE 14SOIC

74HCT74D,653

Manufacturer Part Number
74HCT74D,653
Description
IC FLIP FLOP DUAL D TYPE 14SOIC
Manufacturer
NXP Semiconductors
Series
74HCTr
Type
D-Typer
Datasheet

Specifications of 74HCT74D,653

Package / Case
14-SOIC (3.9mm Width), 14-SOL
Function
Set(Preset) and Reset
Output Type
Differential
Number Of Elements
2
Number Of Bits Per Element
1
Frequency - Clock
18MHz
Delay Time - Propagation
18ns
Trigger Type
Positive Edge
Current - Output High, Low
4mA, 4mA
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
74HCT
Logic Type
D-Type Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
18 ns
High Level Output Current
- 4 mA
Supply Voltage (max)
5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
4.5 V
Technology
CMOS
Number Of Bits
2
Number Of Elements
2
Clock-edge Trigger Type
Positive-Edge
Operating Supply Voltage (typ)
5V
Package Type
SOIC
Low Level Output Current
4mA
Frequency (max)
18MHz
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
14
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1565-2
74HCT74D-T
933713390653

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74HCT74D,653
Manufacturer:
NEXPERIA/安世
Quantity:
20 000
Philips Semiconductors
2003 Jul 10
T
t
t
t
t
t
t
t
f
PHL
THL
W
W
rem
su
h
max
amb
Dual D-type flip-flop with set and reset;
positive-edge trigger
SYMBOL
/t
/t
TLH
PLH
= 40 to +125 C
propagation delay
nCP to nQ, nQ
propagation delay
nSD to nQ, nQ
propagation delay
nRD to nQ, nQ
output transition time
clock pulse width HIGH
or LOW
set or reset pulse width
LOW
removal time set or
reset
set-up time nD to nCP
hold time nCP to nD
maximum clock pulse
frequency
PARAMETER
see Fig.7
see Fig.8
see Fig.8
see Fig.7
see Fig.7
see Fig.8
see Fig.8
see Fig.7
see Fig.7
see Fig.7
WAVEFORMS
TEST CONDITIONS
11
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
4.5
6.0
4.5
6.0
4.5
6.0
4.5
6.0
4.5
6.0
4.5
6.0
2.0
2.0
2.0
2.0
2.0
2.0
2.0
V
CC
(V)
120
24
20
120
24
20
45
9
8
90
18
15
3
3
3
4.0
20
24
MIN.
74HC74; 74HCT74
TYP.
Product specification
265
53
45
300
60
51
300
60
51
110
22
19
MAX.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
UNIT

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