cy29949ait Cypress Semiconductor Corporation., cy29949ait Datasheet - Page 2

• Manufacturer Part Number: cy29949ait
• Description: 2.5v Or 3.3v 200-mhz 1 15 Clock Distribution Buffer
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-07289 Rev. *D
Pin Description
Note:
6
7
4, 5
49, 51
42, 44, 46
31, 33, 35, 37 QC(3:0)
16, 18, 20, 22,
24, 28
9, 10, 11, 12
2
8
1
17, 21, 25, 32,
36, 41, 45, 50
3
13, 15, 19, 23,
29, 30, 34, 38,
43, 47, 48, 52
14, 26, 27, 39,
40,
1. PD = internal pull-down, PU = internal pull-up.
Pin
PECL_CLK
PECL_CLK#
TCLK(0,1)
QA(1,0)
QB(2:0)
QD(5:0)
DSEL(A:D)
TCLK_SEL
PCLK_SEL
MR/OE#
VDDC
VDD
VSS
NC
[1]
Name
VDDC
VDDC
VDDC
VDDC
PWR
I, PD PECL Input Clock
I, PU PECL Input Clock
I, PU External Reference/Test Clock Input
I, PD Divider Select Inputs. When HIGH, selects 2 input divider. When LOW,
I, PD TCLK Select Input. When LOW, TCLK0 clock is selected and when
I, PD PECL Select Input. When HIGH, PECL clock is selected and when LOW
I, PD Output Enable Input. When asserted LOW, the outputs are enabled and
I/O
O
O
O
O
Clock Outputs
Clock Outputs
Clock Outputs
Clock Outputs
selects 1 input divider.
HIGH TCLK1 is selected.
TCLK(0,1) is selected
when asserted HIGH, internal flip-flops are reset and the outputs are
three-stated. If more than 1 bank is being used in /2 mode, a reset must
be performed (MR/OE# asserted high) after power-up to ensure that all
internal flip flops are set to the same state.
2.5V or 3.3V Power Supply for Output Clock Buffers
2.5V or 3.3V Power Supply
Common Ground
Not Connected
Description
CY29949
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