cy28src04 Cypress Semiconductor Corporation., cy28src04 Datasheet - Page 2

• Manufacturer Part Number: cy28src04
• Description: Pci-express Clock Generator
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 001-00043 Rev. *A
Pin Description
Serial Data Interface
To enhance the flexibility and function of the clock synthesizer,
a two-signal serial interface is provided. Through the Serial
Data Interface, various device functions, such as individual
clock output buffers, can be individually enabled or disabled.
The registers associated with the Serial Data Interface
initialize to their default setting upon power-up, and therefore
use of this interface is optional. Clock device register changes
are normally made upon system initialization, if any are
required. The interface cannot be used during system
operation for power management functions.
Table 1. Command Code Definition
Table 2. Block Read and Block Write Protocol
12
20
21
1, 2, 5, 6, 7, 8,
23, 24
18
19
4, 10, 22
3, 9, 11
14
13
17
16
15
Pin No.
18:11
27:20
36:29
(6:5)
(4:0)
8:2
Bit
Bit
10
19
28
1
9
7
Start
Slave address – 7 bits
Write
Acknowledge from slave
Command Code – 8 bits
Acknowledge from slave
Byte Count – 8 bits
Acknowledge from slave
Data byte 1 – 8 bits
0 = Block read or block write operation, 1 = Byte read or byte write operation
Chip select address, set to ‘00’ to access device
Byte offset for byte read or byte write operation. For block read or block write operations, these bits should be '00000'
XIN
VSS_SRC
IREF
SCLK
SDATA
SRCT/C[4:1]
XOUT
VDD_SRC
VDDA
VSSA
VDD_REF
VSS_REF
NC
Block Write Protocol
Name
Description
I
I, PU
I/O, PU SMBus compatible SDATA.
O, DIF 100-MHz Differential Serial reference clock.
I
O
PWR
GND
PWR
GND
PWR
GND
NC
Type
reference.
SMBus compatible SCLOCK. This pin has an internal pull-up.
This pin has an internal pull-up.
14.318-MHz Crystal Input
Ground for SRC outputs
3.3V Analog Power for PLLs
Analog Ground
Ground for Xtal
No Connect
A precision resistor attached to this pin is connected to the internal current
14.318-MHz Crystal Output
3.3V power supply for SRC outputs
3.3V power supply for Xtal
PRELIMINARY
Description
Data Protocol
The clock driver serial protocol accepts byte write, byte read,
block write, and block read operations from the controller. For
block write/read operation, the bytes must be accessed in
sequential order from lowest to highest byte (most significant
bit first) with the ability to stop after any complete byte has
been transferred. For byte write and byte read operations, the
system controller can access individually indexed bytes. The
offset of the indexed byte is encoded in the command code,
as described in Table 1.
The block write and block read protocol is outlined in Table 2
while Table 3 outlines the corresponding byte write and byte
read protocol. The slave receiver address is 11010010 (D2h).
27:21
18:11
Bit
8:2
10
19
20
28
1
9
Start
Slave address – 7 bits
Write
Acknowledge from slave
Command Code – 8 bits
Acknowledge from slave
Repeat start
Slave address – 7 bits
Read = 1
Description
Block Read Protocol
Description
CY28SRC04
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