cy2220 Cypress Semiconductor Corporation., cy2220 Datasheet
cy2220
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cy2220 Summary of contents
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... V 19 SSPCI PCICLK_8 20 PCICLK_9 DDPCI Sel133 SSUSB USBCLK0/SelA 25 USBCLK1/SelB 26 V DDUSB 27 PWR_DWN 28 • San Jose • CA 95134 Revised December 30, 2002 CY2220 V 56 DDMEM MemRef 55 MemRefB SSMEM 52 SPREAD 51 CPUCLK_3 50 CPUCLK_3B V 49 DDCPU 48 CPUCLK_2 CPUCLK_2B SSCPU CPUCLK_1 45 44 CPUCLK_1B ...
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... Reference clock outputs, 14.318 MHz Active LOW input, powers down part when asserted Active LOW input, enables spread spectrum when asserted CPU frequency select input (See Function Table pF. For crystals with different C , please refer to the application note, “Crystal Oscillator LOAD LOAD CY2220 Page ...
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... Output Current Iref = 2.32 mA REF = I = 5*Iref 5*Iref 6*Iref 6*Iref 4*Iref 4*Iref 7*Iref 7*Iref OH Impedance Typical CY2220 REFCLK (MHz) 14.318 N/A N/A Hi-Z 14.318 N/A N/A TCLK PPM +2270 +2022 167 Maximum Page ...
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... IN DD For I =6*IRef Configuration OH USB, REF 3V66, PCI, MemRef, MemRefB USB, REF 3V66, PCI, MemRef, MemRefB Three-state /V = 3.465V 133 MHz DD DD33 CPU 3.465V DD DDQ3 CY2220 Min. Max. Unit 3.135 3.465 22 14.318 14.318 MHz 0.05 50 Min. Max. Unit /2 2 ...
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... Measured with test loads Measured with test loads Measured with test loads Measured with test loads at 3.3V on all output except CPU. Duty Cycle on CPU is measured )Where rising edge and intersecting falling edge CY2220 Min. Max. 55 175 700 OH 0.5 2.0 1.0 4.0 175 700 OH 0 ...
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... Ended Output) Duty Cycle Timing (CPU Differential Output) All Outputs Rise/Fall Time OUTPUT CPU-CPU Clock Skew Host_b Host Host_b Host 3V66-3V66 Clock Skew 3V66 3V66 Document #: 38-07206 Rev CY2220 Page ...
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... PWR_DWN CPUCLK (External) PCICLK (External) VCO Crystal Note: 8. Shaded section on the VCO and Crystal waveforms indicates that the VCO and crystal oscillator are active, and there is a valid clock. Document #: 38-07206 Rev CY2220 Page ...
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... CY2220 Ref, USB Outputs 20 pF PCI, 3V66, MRef Outputs Package Name Package Type O56 56-Pin SSOP O56 56-Pin SSOP 10. All capacitors must be placed as close to the pins as is physically possible. CY2220 Rs 33 CPU Test OUTPUTS Nodes ...
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... FB = Dale ILB1206 - 300 (30 @ 100 MHz 0.005 µF Cermaic Caps C3 = 10–22 µ VIA to GND plane layer V =VIA to respective supply plane layer Note: Each supply plane or strip should have a ferrite bead and capacitors All bypass caps = 0.01 F ceramic CY2220 ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 56-Lead Shrunk Small Outline Package O56 CY2220 51-85062-*C Page ...
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... Document Title: CY2220 133-MHz Spread Spectrum Clock Synthesizer/Driver with Differential CPU Outputs Document Number: 38-07206 Issue REV. ECN NO. Date ** 111730 01/17/02 *A 121841 12/30/02 Document #: 38-07206 Rev. *A Orig. of Change DSG Change from Spec number: 38-00813 to 38-07206 RBI Power up requirements added to Operating Conditions Information CY2220 ...