cy2212 Cypress Semiconductor Corporation., cy2212 Datasheet - Page 7

• Manufacturer Part Number: cy2212
• Description: Clock Generator Lite
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 38-07466 Rev. *A
Figure 9 shows the definition of cycle-to-cycle jitter with
respect to the falling edge of the CLK signal. Cycle-to-cycle
jitter is the difference between cycle times of adjacent cycles.
Equal requirements apply for rising edges of the CLK signal.
t
Figure 10 shows the definition of four-cycle short-term jitter.
Short-term jitter is defined with respect to the falling edge of
the CLK. Four-cycle short-term jitter is the difference between
the cumulative cycle times of adjacent four cycles. Equal
requirements apply for rising edges of the CLK signal. Equal
requirements also apply for two-cycle short-term jitter and
three-cycle short-term jitter, and for five-cycle short-term jitter
and six-cycle short-term jitter. t
short-term jitter over 2, 3, 4, 5, or 6 cycles.
The purpose of this definition of short-term jitter is to define
errors in the measured time (for example, t
expected time. The purpose for measuring the adjacent time
J
is defined as the clock output cycle-to-cycle jitter.
CLK
CLKB
CLK
CLKB
CLK
CLKB
t
J
CYCLE,i
t
CYCLE
is defined as the clock output
t
J
= t
t
JL
CYLCE,i
= t
4CYCLE,i
CYCLE,max
Figure 9. Cycle-to-cycle Jitter
Figure 8. Long-term Jitter
– t
Figure 7. Duty Cycle
CYCLE,i + 1 over 10000 consecutive cycles
) vs. the
DC = t
– t
t
t
CYCLE
CYCLE,i+1
PW +
CYCLE,min over 10000 cycles
t
t
including comparing the measured time to an expected time
based on a local cycle time, t
could be determined by taking the rolling average of a group
of cycles (5–10 cycles) preceding the measured cycles.
However, it is important to differentiate this rolling average
from the average cycle time, t
cycle time over the 10,000 cycles. Using a long-term average
instead of a rolling average would define t
instead of a short-term jitter, and would normally giver overly
pessimistic results.
Figure 11 shows the definition of cycle-to-cycle duty cycle
error. Cycle-to-cycle duty cycle error is defined as the
difference between high-times of adjacent cycles. Equal
requirements apply to the low-times. t
clock output cycle-to-cycle duty cycle error.
/t
4CYCLE, i+1
4CYCLE, i
CYCLE
t
PW+
. Alternate methods of determining t
is only to help determine the expected time for
CYCLE,LOCAL
CYCLE,AVG
DC
, which is the average
,
. This local cycle time
ERR
J
as a long-term jitter
is defined as the
J
CY2212
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are possible,
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