cy2276a-12 Cypress Semiconductor Corporation., cy2276a-12 Datasheet
cy2276a-12
Related parts for cy2276a-12
cy2276a-12 Summary of contents
Page 1
... SDRAM clocks at the CPU clock fre- quency, three 2.5V IOAPIC clocks at 14.318 MHz, and one 3.3V reference clock at 14.318 MHz. The CY2276A-12 and CY2276A-13 can be used with a periph- eral clock generator (CY2030) which can generate USB, I/O, reference, and Audio clocks, thus providing a complete solu- tion for motherboard manufacturers ...
Page 2
... Mode input, not used on this configuration, tie pF. LOAD PCICLK[0–5] REF0 PCICLK_F IOAPIC[0–2] Hi-Z Hi-Z 33.33 MHz 14.318 MHz CPU and PCI Clock Driver Strengths • Matched impedances on both rising and falling edges on the output drivers (MHz) PPM • Output impedance: 25 –195 2 CY2276A-12 CY2276A-13 SS (typical) measured at 1.5V. ...
Page 3
... The Serial bits will be read by the clock driver in the following order: Byte 0 - Bits Byte 1 - Bits Byte N - Bits • Reserved and unused bits should be programmed to “0”. 2 • Address for the CY2276A-12 is ...
Page 4
... Pin # Description Bit 7 24 SDRAM15 (Active/Inactive) Bit 6 25 SDRAM14 (Active/Inactive) Bit 5 32 SDRAM13 (Active/Inactive) Bit 4 33 SDRAM12 (Active/Inactive) Bit 3 18 SDRAM11 (Active/Inactive) Bit 2 19 SDRAM10 (Active/Inactive) Bit 1 21 SDRAM9 (Active/Inactive) Bit 0 22 SDRAM8 (Active/Inactive) Byte 6: Reserved, for future use 4 CY2276A-12 CY2276A-13 ...
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... Three-state V = 3.465V Loaded Outputs CPU clocks = 66.67 MHz V = 3.465V Unloaded Outputs CY2276A-12 CY2276A-13 pins tied together) DD Min. Max. Unit 3.135 3.465 2.375 2.9 2.375 2 30 14.318 14.318 MHz Min. Max. ...
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... Measured at 1.25V for 2.5V clocks, and at 1.5V for 3.3V clocks Measured at 1.25V for 2.5V clocks Measured at 1.5V for 3.3V clocks Measured at 1.5V CPU, PCI, and SDRAM clock stabilization from power-up = 2.5V, CPUCLK duty cycle is measured at 1.25V. DDCPU 6 CY2276A-12 CY2276A-13 Min. Typ. Max. Unit ...
Page 7
... CPUCLK Outputs HIGH/LOW Time t 1C OUTPUT All Outputs Rise/Fall Time OUTPUT CPU-CPU Clock Skew CPUCLK CPUCLK Bus Description CY2276A-12 CY2276A-13 Min. Max. Unit 0 100 kHz 250 300 ns 4.0 s ...
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... Switching Waveforms (continued) CPU-SDRAM Clock Skew CPUCLK SDRAM t 7 CPU-PCI Clock Skew CPUCLK PCICLK Timing Requirements for the I C Bus SDA t 11 SCL CY2276A-12 CY2276A- ...
Page 9
... If a Ferrite Bead is used F– tantalum bypass capacitor should be placed close to the Ferrite Bead. This capacitor prevents power supply droop during current surges. is the loaded characteristic impedance trace from the clock generator V island. Ensure that the Ferrite Bead offers CY2276A-12 CY2276A-13 of LOAD is the series terminating series ...
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... Package Ordering Code Name CY2276APVC-12 O56 56-Pin SSOP CY2276APVC-13 O56 56-Pin SSOP Document #: 38–00614 D V DDQ3 1 56 0 0 0 0 0.1 F OUTPUTS C LOAD Operating Package Type Range Commercial Commercial 10 CY2276A-12 CY2276A-13 V DDQ2 V DDCPU ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 56-Lead Shrunk Small Outline Package O56 CY2276A-12 CY2276A-13 51-85062-B ...