gt3200 SMC Corporation, gt3200 Datasheet - Page 41

• Manufacturer Part Number: gt3200
• Description: Usb2.0 Phy Ic
• Manufacturer: SMC Corporation

USB2.0 PHY IC
SMSC GT3200, SMSC USB3250
PARAMETER
TIMING
T0
T1
T2
T3
T4
TERMSELECT
XCVRSELECT
SUSPENDN
OPMODE 1
OPMODE 0
To detect the assertion of the downstream Chirp K's and Chirp J's for 2.5us {TFILT}, the SIE must see
the appropriate LINESTATE signals asserted continuously for 165 CLK60 cycles.
TXVALID
DP/DM
Figure 8.6 HS Detection Handshake Timing Behavior from Suspend
CLK60
time
Table 8.8 HS Detection Handshake Timing Values from Suspend
While in suspend state an SE0 is detected on the
USB. HS Handshake begins. D+ pull-up enabled, HS
terminations disabled, SUSPENDN negated.
First transition of CLKOUT. CLKOUT "Usable"
(frequency accurate to ±10%, duty cycle accurate to
50±5).
Device asserts Chirp K on the bus.
Device removes Chirp K from the bus. (1 ms
minimum width) and begins looking for host chirps.
CLK "Nominal" (CLKOUT is frequency accurate to
±500 ppm, duty cycle accurate to 50±5).
J
T0
DESCRIPTION
SE0
CLK power up time
DATASHEET
36
T1
T2
Device Chirp K
0 (HS Reset T0)
T0 < T1 < T0 + 5.6ms
T1 < T2 < T0 + 5.8ms
T2 + 1.0 ms < T3 < T0 + 7.0 ms
T1 < T3 < T0 + 20.0ms
T3
T4
Look for host chirps
VALUE
Revision 1.3 (10-05-04)