ds2251 Maxim Integrated Products, Inc., ds2251 Datasheet - Page 5

• Manufacturer Part Number: ds2251
• Description: 128k Soft Microcontroller Module
• Manufacturer: Maxim Integrated Products, Inc.

19, 18
54-41
63-56
PIN
16
17
29
30
20
40
72
64
66
67
31
9
P3.6
operation.
P3.7
operation.
RST - Active high reset input. A logic 1 applied to this pin will activate a reset state. This
pin is pulled down internally, can be left unconnected if not used. An RC power-on reset
circuit is not needed and is NOT recommended.
memory when using the Expanded bus. It is normally an output and should be unconnected
if not used.
ALE - Address Latch Enable. Used to de-multiplex the multiplexed Expanded
Address/Data bus on Port 0. This pin is normally connected to the clock input on a ‘373
type transparent latch.
XTAL2, XTAL1. Used to connect an external crystal to the internal oscillator. XTAL1 is
the input to an inverting amplifier and XTAL2 is the output.
GND - Logic ground.
V
BA15 - Monitor test point to reflect the logical value of A15. Not needed for memory
access.
BA13 - 0. Byte-wide Address bus bits 13-0. This bus is combined with the non-multiplexed
data bus (BD7-0) to access onboard NV SRAM and off-board peripherals. Peripheral
decoding is performed using
are not needed. Read/write access is controlled by R/
memory mapped peripherals.
BD7 - 0. Byte-wide Data bus bits 7-0. This 8-bit bi-directional bus is combined with the
non-multiplexed address bus (BA14-0) to access on-board NV SRAM and off-board
peripherals.
R/
bus. It is controlled by the memory map and Partition. The blocks selected as Program
(ROM) will be write-protected. This signal is also used for the write enable to off-board
peripherals.
when the PES bit is set to a logic 1.
type of peripheral function.
when the PES bit is set to a logic 1.
type of peripheral function.
that only one edge is detected. If connected to ground, the micro will enter Bootstrap
loading on power-up. This signal is pulled up internally.
PSEN
PE3
PE4
PROG
CC
W
- +5V.
- Peripheral Enable 3. Accesses data memory between addresses 8000h and BFFFh
- Peripheral Enable 4. Accesses data memory between addresses C000h and FFFFh
WR
RD
- Read/Write. This signal provides the write enable to the SRAMs on the Byte-wide
- Program Store Enable. This active low signal is used to enable an external program
- Invokes the Bootstrap loader on a falling edge. This signal should be debounced so
. General purpose I/O port pin. Also serves as the read strobe for Expanded bus
. General purpose I/O port pin. Also serves as the write strobe for Expanded bus
PE3
and
PE3
PE4
DESCRIPTION
PE4
5 of 20
is not lithium backed and can be connected to any
is not lithium backed and can be connected to any
. These are on 16k boundaries, so BA14 or BA15
W
. BA13-0 connect directly to
DS2251T