ds2436b Maxim Integrated Products, Inc., ds2436b Datasheet - Page 18

• Manufacturer Part Number: ds2436b
• Description: Ds2436 Battery Id/monitor Chip
• Manufacturer: Maxim Integrated Products, Inc.

The search process is as follows:
1. The bus master begins the initialization sequence by issuing a reset pulse. The slave devices respond
2. The bus master will then issue the search ROM command on the 1-Wire bus.
3. The bus master reads a bit from the 1-Wire bus. Each device will respond by placing the value of the
The data obtained from the two reads of the three-step routine have the following interpretations:
4. The bus master writes a 0. This deselects ROM2 and ROM3 for the remainder of this search pass,
5. The bus master performs two more reads and receives a 0 bit followed by a 1-bit. This indicates that
6. The bus master then writes a 0 to keep both ROM1 and ROM4 coupled.
7. The bus master executes two reads and receives two 0-bits. This indicates that both 1-bits and 0-bits
8. The bus master writes a 0 bit. This deselects ROM1 leaving ROM4 as the only device still connected.
9. The bus master reads the remainder of the ROM bits for ROM4 and continues to access the part if
10. The bus master starts a new ROM search sequence by repeating steps 1 through 7.
11. The bus master writes a 1 bit. This deselects ROM4, leaving only ROM1 still coupled.
by issuing simultaneous presence pulses.
first bit of their respective ROM data onto the 1-Wire bus. ROM1 and ROM4 will place a 0 onto the
1-Wire bus, i.e., pull it low. ROM2 and ROM3 will place a one onto the 1-Wire bus by allowing the
line to stay high. The result is a logical AND of all devices on the line, therefore the bus master sees a
0. The bus master reads another bit. Since the search ROM data command is being executed, all of the
devices on the 1-Wire bus respond to this second read by placing the complement of the first bit of
their respective ROM data onto the 1-Wire bus. ROM1 and ROM4 will place a 1 onto the 1-Wire,
allowing the line to stay high. ROM2 and ROM3 will place a 0 onto the 1-Wire; thus it will be pulled
low. The bus master again observes a 0 for the complement of the first ROM data bit. The bus master
has determined that there are some devices on the 1-Wire bus that have a 0 in the first position and
others that have a 1.
leaving only ROM1 and ROM4 connected to the 1-Wire bus.
all devices still coupled to the bus have 0s as their second ROM data bit.
exist as the third bit of the ROM data of the attached devices.
desired. This completes the first pass and uniquely identifies one part on the 1-Wire bus.
00
01
10
11
There are still devices attached which have conflicting bits in this position.
All devices still coupled have a 0 bit in this bit position.
All devices still coupled have a 1 bit in this bit position.
There are no devices attached to the 1-Wire bus.
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