ds21372 Maxim Integrated Products, Inc., ds21372 Datasheet - Page 9
ds21372
Manufacturer Part Number
ds21372
Description
Ds21372 3.3v Bit Error Rate Tester Bert
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS21372.pdf
(22 pages)
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7. ERROR INSERT REGISTER
The Error Insertion Register (EIR) controls circuitry within the DS21372 that allows the generated
pattern to be intentionally corrupted. Bit errors can be inserted automatically at regular intervals by
properly programming the EIR0 to EIR2 bits or bit errors can be inserted at random (under
microcontroller control) via the EIR.3 bit.
EIR: ERROR INSERT REGISTER (ADDRESS=07 HEX)
ERROR BIT INSERTION Table 3
(MSB)
SYMBOL
-
RINV
TINV
EIB2
EIB2
EIB1
EIB0
SBE
0
0
0
0
1
1
1
1
-
-
-
POSITION
EIB1
EIR.7
EIR.6
EIR.5
EIR.4
EIR.3
EIR.2
EIR.1
EIR.0
0
0
1
1
0
0
1
1
TINV
NAME AND DESCRIPTION
Not Assigned. Should be set to 0 when written to.
Not Assigned. Should be set to 0 when written to.
Transmit Data Inversion Select.
0 = do not invert data to be transmitted at TDATA
1 = invert data to be transmitted at TDATA
Receive Data Inversion Select.
0 = do not invert data received at RDATA
1 = invert data received at RDATA
Single Bit Error Insert. A low to high transition will create a
single bit error. Must be cleared and set again for a subsequent
bit error to be inserted. Can be used to accomplish rates not
addressed in Table 3 (e.g., BER of less than 10
Error Insert Bit 2. See Table 3.
Error Insert Bit 1. See Table 3.
Error Insert Bit 0. See Table 3.
RINV
EIB0
0
1
0
1
0
1
0
1
9 of 22
SBE
no errors automatically inserted
ERROR RATE INSERTED
EIR2
10
10
10
10
10
10
10
-1
-2
-3
-4
-5
-6
-7
EIR1
-7
).
(LSB)
EIR0
DS21372