ds1992l-f5 Maxim Integrated Products, Inc., ds1992l-f5 Datasheet - Page 14

• Manufacturer Part Number: ds1992l-f5
• Description: 1kb/4kb Memory Ibutton
• Manufacturer: Maxim Integrated Products, Inc.

Figure 10. INITIALIZATION PROCEDURE RESET AND PRESENCE PULSE
V
READ/WRITE TIME SLOTS
The definitions of write and read time slots are illustrated in Figure 11. The master driving the data line
low initiates all time slots. The falling edge of the data line synchronizes the DS199_ to the master by
triggering a delay circuit in the DS199_. During write time slots, the delay circuit determines when the
DS199_ samples the data line. For a read data time slot, if a 0 is to be transmitted, the delay circuit
determines how long the DS199_ holds the data line low overriding the 1 generated by the master. If the
data bit is a 1, the iButton leaves the read data time slot unchanged.
Figure 11. READ/WRITE TIMING DIAGRAM
Write-One Time Slot
PULLUP MIN
V
V
PULLUP
V
V
IL MAX
IH MIN
PULLUP MIN
V
0V
V
PULLUP
V
IL MAX
IH MIN
RESISTOR
MASTER
DS199X
0V
RESISTOR
MASTER
"RESET PULSE"
MASTER TX
t
RSTL
t
LOW1
15µs
480 µs £ t
480 µs £ t
15 µs £ t
60 £ t
60 µs £ t
1 µs £ t
1 µs £ t
PDL
t
R
PDH
< 240 µs
RSTH
RSTL
MASTER RX "PRESENCE PULSE"
LOW1
REC
SLOT
t
< 60 µs
PDH
60µs
14of 14
<
Sampling Window
t
<
<
SLOT
< 15 µs
¥
¥
¥
< 120 µs
DS199X
*
**
t
PDL
** Includes recovery time
* In order not to mask interrup signaling
+ t
by other devices on the 10Wire bus t
t
RSTH
R
should always be less than 960 us
t
REC
RSTL