74LCX574MTC Fairchild Semiconductor, 74LCX574MTC Datasheet - Page 2

• Manufacturer Part Number: 74LCX574MTC
• Description: IC FLIP FLOP OCTAL D LV 20TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74LCXr
• Type: D-Type Busr

Specifications of 74LCX574MTC

• Function: Standard
• Output Type: Tri-State Non Inverted
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Frequency - Clock: 150MHz
• Delay Time - Propagation: 8.5ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

©2006 Fairchild Semiconductor Corporation
74LCX574 Rev. 1.6.0
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate
propagation delays.
Connection Diagrams
Pin Descriptions
D
CP
OE
O
0
0
Pin Names
–D
–O
7
7
OE
CP
Pad Assignments for DQFN
SOIC, SOP, SSOP, TSSOP
GND
OE
D
D
D
D
D
D
D
D
Pin Assignments for
D
D
D
D
D
D
D
D
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
10
(Top View)
GND
OE
10
1
O
C
Q
0
V
11
CP
20
CC
Description
D
D
0
20
19
18
17
16
15
14
13
12
11
19
18
17
16
15
14
13
12
O
O
O
O
O
O
O
O
O
C
Q
V
O
O
O
O
O
O
O
O
CP
0
1
2
3
4
5
6
7
1
CC
0
1
2
3
4
5
6
7
D
D
1
O
C
Q
2
D
D
2
O
Q
C
3
2
D
Logic Symbol
Truth Table
H
L
X
Z
NC
Functional Description
The LCX574 consists of eight edge-triggered flip-flops
with individual D-type inputs and 3-STATE true outputs.
The buffered clock and buffered Output Enable are com-
mon to all flip-flops. The eight flip-flops will store the
state of their individual D inputs that meet the setup and
hold time requirements on the LOW-to-HIGH Clock (CP)
transition. With the Output Enable (OE) LOW, the con-
tents of the eight flip-flops are available at the outputs.
When OE is HIGH, the outputs go to the high impedance
state. Operation of the OE input does not affect the load-
ing of the flip-flops.
D
OE CP D
3
H
H
H
H
L
L
L
L
LOW Voltage Level
High Impedance
Inputs
Immaterial
HIGH Voltage Level
O
No Change
LOW-to-HIGH Transition
Q
C
4
H
H
H
H
D
D
4
H
H
H
H
L
L
L
L
O
Internal Outputs
Q
C
5
CP
OE
NC
NC
NC
NC
D
O
Q
H
H
L
L
D
D
0
0
5
D
O
1
1
D
O
O
2
2
C
Q
6
O
D
3
3
O
NC
NC
D
O
D
H
D
Z
Z
Z
Z
L
6
n
4
4
D
O
5
5
D
O
O
Q
C
6
6
Hold
Hold
Load
Load
Data Available
Data Available
No Change in Data
No Change in Data
7
O
D
7
7
D
D
Function
7
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